# filelist

filetypes: ffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g/synopsys/rtl/mac

filenames:
[cell repeats an earlier one in this file: 541 characters]


filenames: main.tcl/reg_map_inc.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e40c3/example_project/hwtest/altera/sval_top


filenames: altera_avalon_onchip_memory2_hw.tcl/em_onchip_memory2_qsys.pm/generate_rtl.pl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2


filenames: alt_vip_vfb_linebuf_ctrl.ocp/alt_vip_vfb_linebuf_ctrl.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_vfb_linebuf_ctrl/src_hdl


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/100g/rtl/pfc/rx

filenames:
[cell repeats an earlier one in this file: 122 characters]


filenames: altera_avalon_dma_256_hwtcl.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_ed/cadence/altera_avalon_dma


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_phylite/ip_arch_nf/timing

filenames:
[cell repeats an earlier one in this file: 131 characters]


filenames: alt_vip_common_mirror.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_mirror/src_hdl


filetypes: ffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/iconnect/alt_hiconnect_dc_fifo

filenames:
[cell repeats an earlier one in this file: 615 characters]


filetypes: ffffdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g_kr4_a10/mentor

filenames:
[cell repeats an earlier one in this file: 116 characters]


filetypes: dffffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/merlin/altera_reset_sequencer

filenames:
[cell repeats an earlier one in this file: 288 characters]


filenames: aldec/cadence/mentor/sdi_ii_rx_protocol_hw.tcl/src_hdl/synopsys
filetypes: dddfdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sdi_ii/sdi_ii_library/sdi_ii_rx_protocol


filenames: auk_dspip_ctc_lte_blk_info.vhd
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/dsp/altera_turbo/LTE/aldec/src/rtl/blk_info


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g/cadence/rtl/ast

filenames:
[cell repeats an earlier one in this file: 229 characters]


filenames: alt_vip_tpg_alg_core.ocp/alt_vip_tpg_alg_core.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_alg_core/src_hdl


filenames: altera_rapidio_reg_mnt.v/altera_rapidio_reg_mnt_drbell.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_rapidio/src/mentor/reg_mnt/tl_large


filetypes: dffddddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_vert_scaler_alg_core

filenames:
[cell repeats an earlier one in this file: 139 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/seriallite_iii/example/common

filenames:
[cell repeats an earlier one in this file: 140 characters]


filenames: altera_xcvr_native_a10_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_xcvr/altera_xcvr_native_phy/altera_xcvr_native_vi/tcl


filenames: altera_avlmm_pr_freeze_bridge_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pr_freeze_bridge/avlmm/top


filenames: seriallite4_phy_adapter.sv/seriallite4_phy_adapter_pam4.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/seriallite4/src/phy/adapter/mentor


filenames: alt_mge_rd_addrdec_mch/alt_mge_rd_avmm_mux_xcvr_rcfg
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/rtl/address_decoder/ip_s10


filenames: altera_sl3_phy_adapter.sv/altera_sl3_phy_adapter_c3.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_sl3/src/phy/adapter/mentor


filetypes: dfffffffffffffffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e100s10/hsl23a10

filenames:
[cell repeats an earlier one in this file: 350 characters]


filenames: DE0-Nano_ADC_Controller.pdf
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/university_program/input_output/altera_up_avalon_de0_nano_adc/doc


filenames: avst_credit_demultiplexer.sv.terp/avst_credit_demultiplexer_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/avalon_st_credit/avst_credit_demultiplexer


filenames: aldec/alt_vip_warp_addr_gen_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_warp_addr_gen


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_cvo_scheduler/aldec


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_mem_if/alt_mem_if_controllers/alt_mem_if_qdrii_controller/mentor

filenames:
[cell repeats an earlier one in this file: 2071 characters]


filetypes: ffffffdf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_oct/altera_oct_core20

filenames:
[cell repeats an earlier one in this file: 144 characters]


filenames: alt_vip_common_clock_crossing_bridge_grey.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_clock_crossing_bridge_grey/src_hdl


filetypes: fffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/gige_pcs/cadence

filenames:
[cell repeats an earlier one in this file: 849 characters]


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_cadence_detect/synopsys/src_hdl

filenames:
[cell repeats an earlier one in this file: 228 characters]


filenames: io_pll_a10.qsys/pll_2_a10.qsys
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE_1588v2/rtl/pll_mpll


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_csc_alg_core/aldec


filetypes: dffdfddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_fir_alg_core

filenames:
[cell repeats an earlier one in this file: 119 characters]


filenames: aldec/alt_vip_chroma_key_alg_core_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_chroma_key_alg_core


filetypes: dfffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_a10_ed/mentor/altera_avalon_dma

filenames:
[cell repeats an earlier one in this file: 252 characters]


filetypes: fffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/mac/aldec/tx

filenames:
[cell repeats an earlier one in this file: 401 characters]


filenames: altera_up_avalon_character_lcd.h/altera_up_avalon_character_lcd_regs.h
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/university_program/audio_video/altera_up_avalon_character_lcd/HAL/inc


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sld/st/altera_streaming_sld_hub_controller

filenames:
[cell repeats an earlier one in this file: 326 characters]


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e2550/50g/aldec/rtl/mac

filenames:
[cell repeats an earlier one in this file: 208 characters]


filenames: alt_ehipc3_fm_sl_traffic_controller
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc3_fm/cadence/example_project/common


filetypes: ddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_mem_if/altera_mem_if_pll

filenames:
[cell repeats an earlier one in this file: 200 characters]


filenames: alt_jtag_csr_master_a10.qsys/alt_jtag_csr_master_s10.ip
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G/rtl/jtag_avalon_master


filenames: bchp_syndrome.vhd/bchp_syndromes_sqr.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/dsp/altera_bch/cadence/bch_dec/src/bchp_syndromes


filenames: altera_eth_tse_pcs_pma_phyip.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/tse_ucores/altera_eth_tse_pcs_pma_phyip/cadence


filenames: common
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc3_fm/mentor/example_project


filenames: altera_mem_if_ddr2_afi_mux_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_mem_if/altera_mem_if_afi_muxes/altera_mem_if_ddr2_afi_mux


filenames: abstract
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_mem_if/alt_mem_if_phys/common/mentor


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/synopsys/altera_rapidio2_native_phy_ip/native_phy_cyclonev/native_phy_4x


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_dil_sobel_scheduler/mentor


filenames: gxb_rx.tcl.terp/gxb_rx_reset.tcl.terp/rx_phy_top.v.terp
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_dp/de_gen/arria_10/rtl/rx_phy


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_stream_cleaner_scheduler/synopsys


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_packet_mux/mentor


filenames: alt_xcvr_pam4_data_comb.sv/alt_xcvr_pam4_data_comb_hw.tcl/alt_xcvr_pam4_data_comb_top.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_pam4_data_comb


filenames: cadence/mentor/models/synopsys/xcelium
filetypes: ddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G/simulation/ed_sim


filenames: altera_eth_avst2gmii_converter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/ethernet_ucore/altera_eth_avst2gmii_converter/mentor


filenames: pkt_client.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e2550/example_project/hwtest/altera/pkt_client


filenames: alt_vip_crs_422_drop_pad.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_crs_422_drop_pad/src_hdl


filenames: xcvr_rst_ctrl.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/cadence/altera_rapidio2_native_phy_ip/xcvr_rst_ctrl/xcvr_rst_ctrl_1x


filetypes: dfffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_jesd204/src/tx_mlpcs/s10_16g

filenames:
[cell repeats an earlier one in this file: 220 characters]


filenames: alt_ehipc2_serial_pcomp.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc2/mentor/rtl/kr


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_gamma_corrector_scheduler/mentor


filenames: altera_pcie_s10_txs.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/synopsys/altera_pcie_s10_txs


filenames: example_project
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc3_fm/mentor


filenames: sv_xcvr_att_custom_native.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_xcvr_att_custom/sv/mentor


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/hsl23a10

filenames:
[cell repeats an earlier one in this file: 1180 characters]


filenames: altera_eth_tse_pcs_pma_nf_phyip.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/tse_ucores/altera_eth_tse_pcs_pma_nf_phyip/synopsys


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e2550/25g_ptp/aldec

filenames:
[cell repeats an earlier one in this file: 290 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/adapter/mentor/rx

filenames:
[cell repeats an earlier one in this file: 237 characters]


filenames: alt_mge_rd_addrdec_mch/alt_mge_rd_avmm_mux_xcvr_rcfg
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G/rtl/address_decoder/ip_s10


filenames: alt_aeu_100_eth_4.v/alt_aeu_clks_100.v/alt_aeu_fifo_depth_100.v/alt_aeu_ptp_rx_100.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/100g/mentor/rtl/eth


filetypes: dfffffffffffffffffffffffffdf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_a10_hip/aldec

filenames:
[cell repeats an earlier one in this file: 722 characters]


filenames: alt_vip_common_dc_mixed_widths_fifo.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/cadence/modules/alt_vip_common_dc_mixed_widths_fifo/src_hdl


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_phylite/ip_cfg_ctrl/mentor


filenames: sdi_ii_colorbar_gen.v/sdi_ii_ed_vid_pattgen.v/sdi_ii_makeframe.v/sdi_ii_patho_gen.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sdi_ii/sdi_ii_example_design/common/rtl/vid_pattgen


filetypes: dffddddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE/rtl

filenames:
[cell repeats an earlier one in this file: 248 characters]


filenames: alt_e40_sys_pll_sv/alt_e40_sys_pll_sv.qip/alt_e40_sys_pll_sv.v
filetypes: dff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/40gbe/example/common/alt_e40_sys_pll_sv


filenames: altera_up_avalon_rs232.c
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/university_program/communication/altera_up_avalon_rs232/HAL/src


filenames: mentor/user_refresh_gen.sv/user_refresh_gen_hw.tcl
filetypes: dff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_mem_if/alt_mem_if_example_design_components/alt_mem_if_rld_user_refresh_gen


filenames: altera_mm_mgmt_wrapper.sv/altera_mm_mgmt_wrapper_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sld/mm/altera_mm_mgmt_wrapper


filenames: altera_pcie_bfm_components.v
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filenames: alt_vip_common_latency_1_to_latency_0.sv/alt_vip_common_video_packet_decode.sv
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filenames:
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filenames: src_hdl
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filetypes: fffff
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filenames:
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filenames: altera_up_avalon_video_bayer_resampler.v
filetypes: f
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filetypes: dffffddd
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filenames:
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filetypes: ffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffffff
dirname:
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filenames:
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filetypes: ffffffffffffffffffffff
dirname:
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filenames:
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filetypes: fffffffff
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filenames:
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filenames: altera_mem_if_pll_bridge_hw.tcl
filetypes: f
dirname:
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filenames: run_vsim.do
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filetypes: ffffffffffffffff
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_mem_if_nextgen_lpddr_controller_core.sv
filetypes: f
dirname:
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filetypes: ffffffffffffffff
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filenames:
[cell repeats an earlier one in this file: 411 characters]


filetypes: ffffff
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filenames:
[cell repeats an earlier one in this file: 145 characters]


filenames: altera_generic_quad_spi_controller2_regs.h
filetypes: f
dirname:
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filenames: rtl
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dirname:
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filenames: altera_rapidio2_dev16_io_slave.v/altera_rapidio2_dev8_io_slave.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/aldec/logical/io_slave/64


filenames: ast/efc/eth/lib/mac/pcs/pfc/ptp
filetypes: dddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g/synopsys/rtl


filenames: alt_interlaken_8lane_6g_tb.sv/run_simulation.do
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_interlaken/design_examples/alt_interlaken_8lane_6g/testbench


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e40c3/hslx/common

filenames:
  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filetypes:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/dsp/intel_fpga_ldpcv_5g/src/rtl/ldpcDec/coreHT

filenames:
  ldpc_decoder_back.sv/ldpc_decoder_berom.sv/ldpc_decoder_compute_llr.sv/ldpc_decoder_compute_mins.sv/ldpc_decoder_core.sv/ldpc_decoder_ferom.sv/ldpc_decoder_fifo.sv/ldpc_decoder_front.sv/ldpc_decoder_input.sv/ldpc_decoder_main.ocp/ldpc_decoder_main.sv/ldpc_decoder_output.sv/ldpc_decoder_pkg.sv/ldpc_decoder_ram.sv/ldpc_decoder_schrom.sv/ldpc_decoder_shifter.sv/ldpc_decoder_top.sv


filenames: alt_vip_fir_scheduler.sv
filetypes: f
dirname:
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filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/dsp/altera_ldpc/src/ldpc_ucores/dec/altera_ldpc_nasa_msa/aldec

filenames:
[cell repeats an earlier one in this file: 169 characters]


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/audio_ip/audio_extract/cadence


filetypes: dfffdffdd
dirname:
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filenames:
[cell repeats an earlier one in this file: 110 characters]


filenames: alt_e40_fec_valid_gen.v/alt_e40_seq_reco_n.v/common_src/sv_fec
filetypes: ffdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/kr4_sv/synopsys


filenames: altera_avalon_packets_to_master.v/altera_avalon_packets_to_master_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master


filenames: altera_avalon_performance_counter.c/perf_print_formatted_report.c
filetypes: ff
dirname:
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filetypes: ffffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 316 characters]


filenames: altera_eth_pfc_generator.v/altera_eth_pfc_generator_qfsm.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/ethernet_ucore/altera_eth_pfc_generator/aldec


filetypes: fffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_jesd204/src/rx/s10_16g/cadence

filenames:
[cell repeats an earlier one in this file: 597 characters]


filenames: src_hdl
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filenames: altera_eth_packet_underflow_control.v
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  alt_ehipc3_fm_clock_crosser.v/alt_ehipc3_fm_ml_ptp.sv/alt_ehipc3_fm_ml_ptp_avmm_csr_bank.sv/alt_ehipc3_fm_ml_ptp_ckt_cal.sv/alt_ehipc3_fm_ml_ptp_convert_commands.sv/alt_ehipc3_fm_ml_ptp_opcode_writer.sv/alt_ehipc3_fm_ml_ptp_ref_ts_capture.sv/alt_ehipc3_fm_ml_ptp_rx_tam_capture.sv/alt_ehipc3_fm_ml_ptp_ts_converter.sv/alt_ehipc3_fm_ml_ptp_tx_tam_capture.sv/alt_ehipc3_fm_ptp_rx_ts_adj_detect.sv/alt_ehipc3_fm_sl_clock_crosser.v/alt_ehipc3_fm_sl_ptp.sv/alt_ehipc3_fm_sl_ptp_avmm_csr_bank.sv/alt_ehipc3_fm_sl_ptp_avmm_csr_bank_sn.sv/alt_ehipc3_fm_sl_ptp_calc_tam.sv/alt_ehipc3_fm_sl_ptp_ckt_cal.sv/alt_ehipc3_fm_sl_ptp_compute_ts.sv/alt_ehipc3_fm_sl_ptp_convert_commands.sv/alt_ehipc3_fm_sl_ptp_opcode_writer.sv/alt_ehipc3_fm_sl_ptp_ref_ts_capture.sv/alt_ehipc3_fm_sl_ptp_ref_ts_capture_sn.sv/alt_ehipc3_fm_sl_ptp_rx_deskew.sv/alt_ehipc3_fm_sl_ptp_rx_tam_capture.sv/alt_ehipc3_fm_sl_ptp_rx_tam_capture_sn.sv/alt_ehipc3_fm_sl_ptp_sn.sv/alt_ehipc3_fm_sl_ptp_sn_latency.sv/alt_ehipc3_fm_sl_ptp_sn_roll_over.sv/alt_ehipc3_fm_sl_ptp_sn_sclk.sv/alt_ehipc3_fm_sl_ptp_sn_tam.sv/alt_ehipc3_fm_sl_ptp_sn_wire_delay.sv/alt_ehipc3_fm_sl_ptp_sticky_register.sv/alt_ehipc3_fm_sl_ptp_sub_nano.sv/alt_ehipc3_fm_sl_ptp_tam_adj_detect.sv/alt_ehipc3_fm_sl_ptp_tam_capture_count.sv/alt_ehipc3_fm_sl_ptp_ts_converter.sv/alt_ehipc3_fm_sl_ptp_ts_converter_sn.sv/alt_ehipc3_fm_sl_ptp_tx_tam_capture.sv/alt_ehipc3_fm_sl_ptp_tx_tam_capture_sn.sv


filenames: aldec/alt_vip_gamma_corrector_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_gamma_corrector_scheduler


filenames: cadence/ilk_12l_10g_rx_stripe_adapter.v/ilk_12l_10g_tx_stripe_adapter.v/mentor/synopsys
filetypes: dffdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_interlaken_hp/ilk_striper/12lane


filenames: class.ptf/em_clock_crossing_fifo.pl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sopc_builder_ip/altera_avalon_clock_crossing


filenames: altpcie_cv_hip_avmm_hwtcl.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_cv_hip_avmm/cadence


filenames: aldec/alt_vip_cpp_converter_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_cpp_converter


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sdi_ii/sdi_ii_example_design/common/simulation/testbench/rx_checker

filenames:
[cell repeats an earlier one in this file: 192 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_message_width_adapt/synopsys


filenames: altera_rapidio_drbell.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_rapidio/src/mentor/logical/drbell


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/100g/synopsys/rtl/efc/rx

filenames:
[cell repeats an earlier one in this file: 122 characters]


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/kr4_sv/cadence/sv_fec

filenames:
[cell repeats an earlier one in this file: 1363 characters]


filenames: ast2avmm_bridge_256_hwtcl.sv/ast2avmm_bridge_c2e_256_hwtcl.sv/rp_avmm_256
filetypes: ffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_ed/cadence/ast2avmm_bridge_256


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/100g/mentor/rtl/pma

filenames:
[cell repeats an earlier one in this file: 113 characters]


filenames: altera_eth_avalon_mm_adapter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/MAC/cadence/adapters/altera_eth_avalon_mm_adapter


filenames: alt_vip_common_data_by_line_rearrange.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_data_by_line_rearrange/src_hdl


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_xcvr/alt_xcvr_core/nd/tcl

filenames:
  avr_hssi_common_util.tcl/avr_hssi_parameters.tcl/ct1_atx_pll_avmm2_if_rbc.tcl/ct1_atx_pll_avmm2_if_simple.tcl/ct1_atx_pll_param_mapping_util.tcl/ct1_atx_pll_parameters.tcl/ct1_atx_pll_rbc.tcl/ct1_atx_pll_simple.tcl/ct1_atx_pll_util.tcl/ct1_cdr_pll_parameters.tcl/ct1_cdr_pll_rbc.tcl/ct1_cdr_pll_simple.tcl/ct1_cmu_fpll_param_mapping_util.tcl/ct1_cmu_fpll_parameters.tcl/ct1_cmu_fpll_rbc.tcl/ct1_cmu_fpll_refclk_select_mux_rbc.tcl/ct1_cmu_fpll_simple.tcl/ct1_cmu_fpll_util.tcl/ct1_fpll_avmm2_if_rbc.tcl/ct1_fpll_avmm2_if_simple.tcl/ct1_hssi_10g_rx_pcs_rbc.tcl/ct1_hssi_10g_rx_pcs_simple.tcl/ct1_hssi_10g_tx_pcs_rbc.tcl/ct1_hssi_10g_tx_pcs_simple.tcl/ct1_hssi_8g_rx_pcs_rbc.tcl/ct1_hssi_8g_rx_pcs_simple.tcl/ct1_hssi_8g_tx_pcs_rbc.tcl/ct1_hssi_8g_tx_pcs_simple.tcl/ct1_hssi_adapt_rx_rbc.tcl/ct1_hssi_adapt_rx_simple.tcl/ct1_hssi_adapt_tx_rbc.tcl/ct1_hssi_adapt_tx_simple.tcl/ct1_hssi_aibcr_rx_rbc.tcl/ct1_hssi_aibcr_rx_simple.tcl/ct1_hssi_aibcr_tx_rbc.tcl/ct1_hssi_aibcr_tx_simple.tcl/ct1_hssi_aibnd_rx_rbc.tcl/ct1_hssi_aibnd_rx_simple.tcl/ct1_hssi_aibnd_tx_rbc.tcl/ct1_hssi_aibnd_tx_simple.tcl/ct1_hssi_avmm1_if_rbc.tcl/ct1_hssi_avmm1_if_simple.tcl/ct1_hssi_common_pcs_pma_interface_rbc.tcl/ct1_hssi_common_pcs_pma_interface_simple.tcl/ct1_hssi_common_pld_pcs_interface_rbc.tcl/ct1_hssi_common_pld_pcs_interface_simple.tcl/ct1_hssi_common_util.tcl/ct1_hssi_fifo_rx_pcs_rbc.tcl/ct1_hssi_fifo_rx_pcs_simple.tcl/ct1_hssi_fifo_tx_pcs_rbc.tcl/ct1_hssi_fifo_tx_pcs_simple.tcl/ct1_hssi_gen3_rx_pcs_rbc.tcl/ct1_hssi_gen3_rx_pcs_simple.tcl/ct1_hssi_gen3_tx_pcs_rbc.tcl/ct1_hssi_gen3_tx_pcs_simple.tcl/ct1_hssi_krfec_rx_pcs_rbc.tcl/ct1_hssi_krfec_rx_pcs_simple.tcl/ct1_hssi_krfec_tx_pcs_rbc.tcl/ct1_hssi_krfec_tx_pcs_simple.tcl/ct1_hssi_param_mapping_util.tcl/ct1_hssi_parameters.tcl/ct1_hssi_pipe_gen1_2_rbc.tcl/ct1_hssi_pipe_gen1_2_simple.tcl/ct1_hssi_pipe_gen3_rbc.tcl/ct1_hssi_pipe_gen3_simple.tcl/ct1_hssi_pldadapt_rx_rbc.tcl/ct1_hssi_pldadapt_rx_simple.tcl/ct1_hssi_pldadapt_tx_rbc.tcl/ct1_hssi_pldadapt_tx_simple.tcl/ct1_hssi_pma_cgb_master_rbc.tcl/ct1_hssi_pma_lc_refclk_select_mux_rbc.tcl/ct1_hssi_refclk_divider_rbc.tcl/ct1_hssi_rx_pcs_pma_interface_rbc.tcl/ct1_hssi_rx_pcs_pma_interface_simple.tcl/ct1_hssi_rx_pld_pcs_interface_rbc.tcl/ct1_hssi_rx_pld_pcs_interface_simple.tcl/ct1_hssi_tx_pcs_pma_interface_rbc.tcl/ct1_hssi_tx_pcs_pma_interface_simple.tcl/ct1_hssi_tx_pld_pcs_interface_rbc.tcl/ct1_hssi_tx_pld_pcs_interface_simple.tcl/ct1_mcgb_parameters.tcl/ct1_mcgb_util.tcl/ct1_pma_adapt_rbc.tcl/ct1_pma_adapt_simple.tcl/ct1_pma_cdr_refclk_rbc.tcl/ct1_pma_cdr_refclk_simple.tcl/ct1_pma_cgb_rbc.tcl/ct1_pma_cgb_simple.tcl/ct1_pma_rx_buf_rbc.tcl/ct1_pma_rx_buf_simple.tcl/ct1_pma_rx_deser_rbc.tcl/ct1_pma_rx_deser_simple.tcl/ct1_pma_rx_dfe_rbc.tcl/ct1_pma_rx_dfe_simple.tcl/ct1_pma_rx_odi_rbc.tcl/ct1_pma_rx_odi_simple.tcl/ct1_pma_rx_sd_rbc.tcl/ct1_pma_rx_sd_simple.tcl/ct1_pma_tx_buf_rbc.tcl/ct1_pma_tx_buf_simple.tcl/ct1_pma_tx_ser_rbc.tcl/ct1_pma_tx_ser_simple.tcl/ct2_atx_pll_avmm2_if_rbc.tcl/ct2_atx_pll_avmm2_if_simple.tcl/ct2_atx_pll_param_mapping_util.tcl/ct2_atx_pll_parameters.tcl/ct2_atx_pll_rbc.tcl/ct2_atx_pll_simple.tcl/ct2_atx_pll_util.tcl/ct2_cdr_pll_parameters.tcl/ct2_cdr_pll_rbc.tcl/ct2_cdr_pll_simple.tcl/ct2_cmu_fpll_param_mapping_util.tcl/ct2_cmu_fpll_parameters.tcl/ct2_cmu_fpll_rbc.tcl/ct2_cmu_fpll_refclk_select_mux_rbc.tcl/ct2_cmu_fpll_simple.tcl/ct2_cmu_fpll_util.tcl/ct2_fpll_avmm2_if_rbc.tcl/ct2_fpll_avmm2_if_simple.tcl/ct2_hssi_10g_rx_pcs_rbc.tcl/ct2_hssi_10g_rx_pcs_simple.tcl/ct2_hssi_10g_tx_pcs_rbc.tcl/ct2_hssi_10g_tx_pcs_simple.tcl/ct2_hssi_8g_rx_pcs_rbc.tcl/ct2_hssi_8g_rx_pcs_simple.tcl/ct2_hssi_8g_tx_pcs_rbc.tcl/ct2_hssi_8g_tx_pcs_simple.tcl/ct2_hssi_adapt_rx_rbc.tcl/ct2_hssi_adapt_rx_simple.tcl/ct2_hssi_adapt_tx_rbc.tcl/ct2_hssi_adapt_tx_simple.tcl/ct2_hssi_aibcr_rx_rbc.tcl/ct2_hssi_aibcr_rx_simple.tcl/ct2_hssi_aibcr_tx_rbc.tcl/ct2_hssi_aibcr_tx_simple.tcl/ct2_hssi_aibnd_rx_rbc.tcl/ct2_hssi_aibnd_rx_simple.tcl/ct2_hssi_aibnd_tx_rbc.tcl/ct2_hssi_aibnd_tx_simple.tcl/ct2_hssi_avmm1_if_rbc.tcl/ct2_hssi_avmm1_if_simple.tcl/ct2_hssi_common_pcs_pma_interface_rbc.tcl/ct2_hssi_common_pcs_pma_interface_simple.tcl/ct2_hssi_common_pld_pcs_interface_rbc.tcl/ct2_hssi_common_pld_pcs_interface_simple.tcl/ct2_hssi_common_util.tcl/ct2_hssi_fifo_rx_pcs_rbc.tcl/ct2_hssi_fifo_rx_pcs_simple.tcl/ct2_hssi_fifo_tx_pcs_rbc.tcl/ct2_hssi_fifo_tx_pcs_simple.tcl/ct2_hssi_gen3_rx_pcs_rbc.tcl/ct2_hssi_gen3_rx_pcs_simple.tcl/ct2_hssi_gen3_tx_pcs_rbc.tcl/ct2_hssi_gen3_tx_pcs_simple.tcl/ct2_hssi_krfec_rx_pcs_rbc.tcl/ct2_hssi_krfec_rx_pcs_simple.tcl/ct2_hssi_krfec_tx_pcs_rbc.tcl/ct2_hssi_krfec_tx_pcs_simple.tcl/ct2_hssi_param_mapping_util.tcl/ct2_hssi_parameters.tcl/ct2_hssi_pipe_gen1_2_rbc.tcl/ct2_hssi_pipe_gen1_2_simple.tcl/ct2_hssi_pipe_gen3_rbc.tcl/ct2_hssi_pipe_gen3_simple.tcl/ct2_hssi_pldadapt_rx_rbc.tcl/ct2_hssi_pldadapt_rx_simple.tcl/ct2_hssi_pldadapt_tx_rbc.tcl/ct2_hssi_pldadapt_tx_simple.tcl/ct2_hssi_pma_cgb_master_rbc.tcl/ct2_hssi_pma_cgb_master_simple.tcl/ct2_hssi_pma_lc_refclk_select_mux_rbc.tcl/ct2_hssi_refclk_divider_rbc.tcl/ct2_hssi_rx_pcs_pma_interface_rbc.tcl/ct2_hssi_rx_pcs_pma_interface_simple.tcl/ct2_hssi_rx_pld_pcs_interface_rbc.tcl/ct2_hssi_rx_pld_pcs_interface_simple.tcl/ct2_hssi_tx_pcs_pma_interface_rbc.tcl/ct2_hssi_tx_pcs_pma_interface_simple.tcl/ct2_hssi_tx_pld_pcs_interface_rbc.tcl/ct2_hssi_tx_pld_pcs_interface_simple.tcl/ct2_mcgb_parameters.tcl/ct2_mcgb_util.tcl/ct2_pma_adapt_rbc.tcl/ct2_pma_adapt_sequencer_rbc.tcl/ct2_pma_adapt_sequencer_simple.tcl/ct2_pma_adapt_simple.tcl/ct2_pma_cdr_refclk_rbc.tcl/ct2_pma_cdr_refclk_simple.tcl/ct2_pma_cgb_rbc.tcl/ct2_pma_cgb_simple.tcl/ct2_pma_pcie_gen_switch_rbc.tcl/ct2_pma_reset_sequencer_rbc.tcl/ct2_pma_reset_sequencer_simple.tcl/ct2_pma_rx_buf_rbc.tcl/ct2_pma_rx_buf_simple.tcl/ct2_pma_rx_deser_rbc.tcl/ct2_pma_rx_deser_simple.tcl/ct2_pma_rx_dfe_rbc.tcl/ct2_pma_rx_dfe_simple.tcl/ct2_pma_rx_odi_rbc.tcl/ct2_pma_rx_odi_simple.tcl/ct2_pma_rx_sd_rbc.tcl/ct2_pma_rx_sd_simple.tcl/ct2_pma_tx_buf_rbc.tcl/ct2_pma_tx_buf_simple.tcl/ct2_pma_tx_sequencer_rbc.tcl/ct2_pma_tx_sequencer_simple.tcl/ct2_pma_tx_ser_rbc.tcl/ct2_pma_tx_ser_simple.tcl/ct2_pma_txpath_chnsequencer_rbc.tcl/ct2_pma_txpath_chnsequencer_simple.tcl/ct3_hssi_adapt_rx_rbc.tcl/ct3_hssi_adapt_rx_simple.tcl/ct3_hssi_adapt_tx_rbc.tcl/ct3_hssi_adapt_tx_simple.tcl/ct3_hssi_aibcr_rx_rbc.tcl/ct3_hssi_aibcr_rx_simple.tcl/ct3_hssi_aibcr_tx_rbc.tcl/ct3_hssi_aibcr_tx_simple.tcl/ct3_hssi_aibnd_rx_rbc.tcl/ct3_hssi_aibnd_rx_simple.tcl/ct3_hssi_aibnd_tx_rbc.tcl/ct3_hssi_aibnd_tx_simple.tcl/ct3_hssi_avmm1_if_rbc.tcl/ct3_hssi_avmm1_if_simple.tcl/ct3_hssi_avmm2_if_rbc.tcl/ct3_hssi_avmm2_if_simple.tcl/ct3_hssi_common_util.tcl/ct3_hssi_ehip_lane_rbc.tcl/ct3_hssi_ehip_lane_simple.tcl/ct3_hssi_param_mapping_util.tcl/ct3_hssi_parameters.tcl/ct3_hssi_pldadapt_rx_rbc.tcl/ct3_hssi_pldadapt_rx_simple.tcl/ct3_hssi_pldadapt_tx_rbc.tcl/ct3_hssi_pldadapt_tx_simple.tcl/ct3_hssi_rsfec_rbc.tcl/ct3_hssi_rsfec_simple.tcl/ct3_hssi_rsfecrx_mux_rbc.tcl/ct3_hssi_rsfecrx_mux_simple.tcl/ct3_hssi_xcvr_rbc.tcl/ct3_hssi_xcvr_refclk_mux_rbc.tcl/ct3_hssi_xcvr_refclk_mux_simple.tcl/ct3_hssi_xcvr_simple.tcl/rnr_hssi_common_util.tcl/rnr_hssi_parameters.tcl/whr_hssi_aibnd_rx_rbc.tcl/whr_hssi_aibnd_rx_simple.tcl/whr_hssi_aibnd_tx_rbc.tcl/whr_hssi_aibnd_tx_simple.tcl/whr_hssi_avmm1_if_rbc.tcl/whr_hssi_avmm1_if_simple.tcl/whr_hssi_avmm2_if_rbc.tcl/whr_hssi_avmm2_if_simple.tcl/whr_hssi_common_util.tcl/whr_hssi_ctp_rbc.tcl/whr_hssi_ctp_simple.tcl/whr_hssi_param_mapping_util.tcl/whr_hssi_parameters.tcl/whr_hssi_pldadapt_rx_rbc.tcl/whr_hssi_pldadapt_rx_simple.tcl/whr_hssi_pldadapt_tx_rbc.tcl/whr_hssi_pldadapt_tx_simple.tcl

filetypes:
  ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff


filenames: altera_jesd204_pll_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_jesd204/src/lib/pll_wrapper


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/dsp/altera_fft_ii/c_model/old_arch

filenames:
[cell repeats an earlier one in this file: 159 characters]


filetypes: dfddfdfdffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/hwtesting/system_console

filenames:
[cell repeats an earlier one in this file: 151 characters]


filenames: alt_e100_phy_pcs.v/alt_e100_phy_pcs_caui4.v/common/rx/tx
filetypes: ffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/phy/synopsys/pcs


filenames: hslx
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc2/synopsys/rtl/alt_ehipc2_lib


filenames: default_test_params_pkg.sv.terp/ed_sim
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII_1588v2/simulation


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/mentor_vip_ae/axi3/examples/ex1_back_to_back_sv

filenames:
[cell repeats an earlier one in this file: 107 characters]


filenames: hc_rom_reconfig_gen.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/alt_mem_if/alt_mem_if_example_design_components/alt_mem_if_hcx_rom_reconfig_gen/mentor


filenames: altera_rapidio2_dev16_drbell.v/altera_rapidio2_dev8_drbell.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/mentor/logical/doorbell


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.2.0/QuartusPrimePro/20.2/ip/altera/sdi_ii/sdi_ii_library/sdi_ii_tx_protocol/synopsys/src_hdl

filenames:
[cell repeats an earlier one in this file: 178 characters]


filenames: spi_hw.tcl
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