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filetypes:
[cell repeats an earlier one in this file: 259 characters]


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/quartus/common/templates/signaltap/template_source

filenames:
  Capture Avalon Memory Mapped Transactions.stp/Conditional Storage Qualifier.gif/Conditional Storage Qualifier.stp/Cross-triggering Between STP Instances.gif/Cross-triggering Between STP Instances.stp/Default Using Streaming.stp/Default with Hidden Hierarchy and Data Log.gif/Default with Hidden Hierarchy and Data Log.stp/Default.gif/Default.stp/Define Trigger Condition in RTL.stp/Define Trigger Condition in RTL1.gif/Define Trigger Condition in RTL2.gif/Input Port Storage Qualifier.gif/Input Port Storage Qualifier.stp/Setup for Incremental Compilation.gif/Setup for Incremental Compilation.stp/Simple Avalon Streaming Interface Bus Performance Analysis.stp/Start-Stop Storage Qualifier.gif/Start-Stop Storage Qualifier.stp/State-Based Storage Qualifier 1.gif/State-Based Storage Qualifier 2.gif/State-Based Storage Qualifier.stp/State-Based Trigger Flow Control 1.gif/State-Based Trigger Flow Control 2.gif/State-Based Trigger Flow Control.stp/Transitional Storage Qualifier.gif/Transitional Storage Qualifier.stp/Trigger After 5 Consecutive Transitions.stp/Trigger After Condition1 is Followed by Condition2.stp/Trigger After a Violation of Sequence From Condition1 To Condition4.stp/Trigger Position Defined Using Sample Count.stp/Trigger Position Defined Using Sample Count1.gif/Trigger Position Defined Using Sample Count2.gif/Trigger When Condition1 Occurs Less Than 5 Times Between Condition2 and Condition3.stp/Trigger on 5th Occurrence of a Group Value.stp/Trigger on Condition1 Followed by Condition2 After 5 Clock Cycles.stp/Trigger on Condition1 Followed by Condition2 Within 5 Samples.stp/Trigger on Condition1 Immediately Followed by Condition2.stp/Trigger on Condition1 Not Followed by Condition2 Within 5 Samples.stp/Trigger on Condition2 Not Occurring Between Condition1 and Condition3.stp/Trigger on Event Absent for Less Than 5 Clock Cycles.stp/Trigger on a Sequence of Edges.stp/Trigger on an Event Absent for Greater Than or Equal to 5 Clock Cycles.stp/Trigger on the 5th Consecutive Occurrence of Condition1.stp/Trigger on the 5th Transition of a Group Value Using Advanced Trigger Condition.stp/Trigger on the 5th Transition of a Group Value Using Basic_AND Trigger Condition.stp/Trivial Advanced Trigger Condition 1.gif/Trivial Advanced Trigger Condition 2.gif/Trivial Advanced Trigger Condition.stp/Use Counters in the State-based Flow Control to Collect Stats.stp/avmm_template_screen.gif/avst_perf_template_screen_1.gif/avst_perf_template_screen_2.gif/avst_perf_template_screen_3.gif/b2p_stats_template_screen_1.gif/b2p_stats_template_screen_2.gif/t_c1_c2.gif/t_c1_c2_c3.gif/t_c1_then_c2.gif/t_edge_detect_advanced.gif/t_edge_sequence.gif/t_m1_5th_transition.gif/t_violation_sequence.gif/tc_basic_aa.gif/w_5_conseq_transitions.gif/w_5th_occur.gif/w_a_b_after_5.gif/w_a_b_within_5.gif/w_a_not_b_within5.gif/w_abs_gt_5.gif/w_abs_lt_5.gif/w_c1_c2_immediate.gif/w_c1_lt_5_bt_c2_c3.gif/w_c1_then_c2.gif/w_c1_then_c3_not_c2.gif/w_conseq_5th_occurrance_a.gif/w_edge_sequence.gif/w_m1_5th_transition.gif/w_m2_5th_transition.gif/w_violation_sequence.gif


filenames: vcs_setup.sh
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/quartus/qdesigns/binary_cam/mw/pll_sv_sim/synopsys/vcs


filenames: .packlist
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/quartus/linux64/perl/lib/site_perl/5.30.3/x86_64-linux/auto/Specio


filenames: requirements
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/nios2eds/bin/gnu/src/gcc-10.3.1/libstdc++-v3/testsuite/21_strings/char_traits


filenames: opt_random.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/nios2eds/bin/gnu/nios2-elf/include/c++/10.3.1/nios2-elf/march-r2/mbmx/mno-hw-mul/fstack-limit-register-et/ext


filenames: MetaRole.pm/TypeConstraints/TypeConstraints.pm
filetypes: fdf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/quartus/linux64/perl/lib/site_perl/5.30.3/x86_64-linux/Moose/Util


filenames: crtbegin.o/crtend.o/crti.o/crtn.o/fstack-limit-register-et/libgcc.a/libgcov.a/pg
filetypes: ffffdffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/nios2eds/bin/gnu/H-x86_64-pc-linux-gnu/lib/gcc/nios2-elf/10.3.1/march-r2/mcdx/mno-hw-mul


filenames: .packlist/multidimensional.so
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/quartus/linux64/perl/lib/site_perl/5.30.3/x86_64-linux/auto/multidimensional


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/nios2eds/bin/gnu/src/newlib-4.1.0/newlib/libc/posix

filenames:
[cell repeats an earlier one in this file: 498 characters]


filenames: 53361.cc/aggregate_initialization.cc/deduction.cc/deduction_neg.cc
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tn/ddb_falconmesa_cw_ar_spine_37_bf_model1_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_37_bf_model4_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_37_bf_model4_pwr.utn/ddb_falconmesa_cw_ar_spine_37_bf_model4_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_37_bf_model5_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_37_bf_model6_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_37_bf_model7_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model1_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model1_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model1_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model4_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model4_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model4_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model5_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model6_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_43_bf_model7_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model1_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model1_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model1_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model4_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model4_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model4_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model5_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model6_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_bf_model7_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model1_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model1_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model1_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model4_dynamic_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model4_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model4_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model5_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model6_supply_map_pwr.utn/ddb_falconmesa_cw_ar_spine_rowbuf_bf_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model1_dynamic_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model1_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model4_dynamic_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model4_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clksw_mux_f_bf_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model1_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model4_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_buffer_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model1_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model4_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_l_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_r_w_model1_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_r_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_r_w_model4_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_r_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_r_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_dsp_r_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model1_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model4_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_hiotl_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model1_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model4_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_l_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model1_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model4_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_lab_mlab_r_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_cc_clktap_m20k_l_w_model1_pwr.utn/ddb_falconm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ddb_falconmesa_cw_cram_pr_alb_r_w_model1_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model1_supply_map_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model4_dynamic_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model4_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model4_supply_map_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model5_supply_map_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model6_supply_map_pwr.utn/ddb_falconmesa_cw_cram_pr_alb_r_w_model7_supply_map_pwr.utn/ddb_falconmesa_cw_ds-pfff-0p630v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-pfff-0p630v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-pfff-0p630v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-pfff-0p630v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-pfff-0p840v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-pfff-0p840v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-pfff-0p860v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-pfff-0p860v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-pfff-0p892v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-pfff-0p892v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-pfff-0p892v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-pfff-0p892v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-psss-0p735v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-psss-0p735v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-psss-0p735v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-psss-0p735v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p643v-0c-prcf-prcf-0_model.ddb/ddb_falconmesa_cw_ds-tttt-0p643v-0c-prcs-prcs-0_model.ddb/ddb_falconmesa_cw_ds-tttt-0p643v-0c-tttt-tttt-0_model.ddb/ddb_falconmesa_cw_ds-tttt-0p643v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p643v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p643v-125c-tttt-tttt-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p735v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p735v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p735v-125c-tttt-tttt-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p735v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p735v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p735v-m40c-tttt-tttt-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p781v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p781v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p781v-125c-tttt-tttt-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p781v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p781v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p781v-m40c-tttt-tttt-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p892v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p892v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p892v-125c-tttt-tttt-125_model.ddb/ddb_falconmesa_cw_ds-tttt-0p930v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p930v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds-tttt-0p930v-m40c-tttt-tttt-m40_model.ddb/ddb_falconmesa_cw_ds_common_model.ddb/ddb_falconmesa_cw_ds_es-pfff-0p630v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es-pfff-0p630v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_es-pfff-0p840v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es-pfff-0p860v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_es-psss-0p735v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es-psss-0p735v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_es-tttt-0p630v-125c-tttt-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es-tttt-0p630v-m40c-tttt-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_es-tttt-0p735v-125c-tttt-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es-tttt-0p735v-m40c-tttt-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_es-tttt-0p781v-125c-tttt-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es-tttt-0p781v-m40c-tttt-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_es_common_model.ddb/ddb_falconmesa_cw_ds_es_proto-tttt-0p735v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_es_proto_common_model.ddb/ddb_falconmesa_cw_ds_model1_dynamic_pwr.utn/ddb_falconmesa_cw_ds_model1_pwr.utn/ddb_falconmesa_cw_ds_model1_supply_map_pwr.utn/ddb_falconmesa_cw_ds_model4_dynamic_pwr.utn/ddb_falconmesa_cw_ds_model4_pwr.utn/ddb_falconmesa_cw_ds_model4_supply_map_pwr.utn/ddb_falconmesa_cw_ds_model5_supply_map_pwr.utn/ddb_falconmesa_cw_ds_model6_supply_map_pwr.utn/ddb_falconmesa_cw_ds_model7_supply_map_pwr.utn/ddb_falconmesa_cw_ds_proto-pfff-0p630v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p630v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p630v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p630v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p840v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p840v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p860v-m40c-prcf-prcf-m40_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p860v-m40c-prcs-prcs-m40_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p892v-125c-prcf-prcf-125_model.ddb/ddb_falconmesa_cw_ds_proto-pfff-0p892v-125c-prcs-prcs-125_model.ddb/ddb_falconmesa_cw_ds_prot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