# filelist

filenames: src
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_turbo/UMTS/cadence


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/40g/cadence/rtl/ptp

filenames:
[cell repeats an earlier one in this file: 294 characters]


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e100s10/100g/cadence/rtl/csr

filenames:
[cell repeats an earlier one in this file: 156 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_message_sink_terminator/mentor


filenames: inc/src
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/university_program/input_output/altera_up_avalon_adc/HAL


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_output_interface_bridge/synopsys


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/synopsys/modules/alt_vip_common_seq_par_convert


filenames: alt_vip_common_sync_generation.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/aldec/modules/alt_vip_common_sync_generation/src_hdl


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sdi_ii/sdi_ii_library/sdi_ii_rx_phy_mgmt/cadence/src_hdl

filenames:
  sdi_ii_rx_phy_mgmt.v/sdi_ii_rx_rate_detect.v/sdi_ii_rx_sample.v/sdi_ii_rx_vid_std_detect.v/sdi_ii_rx_xcvr_ctrl_direct.v/sdi_ii_rx_xcvr_ctrl_native.v/sdi_ii_rx_xcvr_interface.v


filetypes: fffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/gige_pcs/aldec

filenames:
[cell repeats an earlier one in this file: 849 characters]


filetypes: fffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/sv_soft_10gbaser/sv_soft_pcs

filenames:
[cell repeats an earlier one in this file: 539 characters]


filenames: pcie_de_ep_dma_g1x8_av_integrated.qsys
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_hip_256_avmm/example_design/av


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/cpriphy/cpriphy_ftile/mentor


filenames: sl4_f_avmm1.sv/sl4_f_avmm2.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sl4_f/src/phy/adapter/mentor


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_fir_alg_core/src_hdl

filenames:
[cell repeats an earlier one in this file: 274 characters]


filenames: mem_ss_reset_controller.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/subsystems/mem_ss/ip_reset_controller/synopsys/rtl


filenames: axi_ocram_hw.tcl/timer_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hps/altera_hps_arria_10/device_tree_generation


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC_CPRI/hardware_test_design/ip_s10/nios_system

filenames:
[cell repeats an earlier one in this file: 192 characters]


filenames: alt_xcvr_tb_stim_gen_pam4_hw.tcl/alt_xcvr_tb_stim_gen_pam4_top.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_tb_stim_gen_pam4


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/25g/rtl/pcs

filenames:
[cell repeats an earlier one in this file: 153 characters]


filenames: altera_eth_pad_inserter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_pad_inserter/cadence


filenames: alt_mge_phy_multi_speed_10g.sdc
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_mge_phy/example


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/hbm/ip_axi_ufi_adapter/synopsys


filetypes: ffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl/cadence/whr_adapters/adapter_gen4x8

filenames:
[cell repeats an earlier one in this file: 651 characters]


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e100s10/100g/rtl/csr

filenames:
[cell repeats an earlier one in this file: 156 characters]


filenames: altera_xcvr_custom.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_xcvr_8g_custom/xcvr_generic/intelfpga


filenames: auk_dspip_ctc_umts_ast_sink.vhd
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_turbo/UMTS/mentor/src/rtl/ast


filenames: eth_anlt_f_arb.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/eth_anlt_f/intelfpga/rtl/csr


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e100s10/100g/intelfpga/rtl/stats

filenames:
[cell repeats an earlier one in this file: 106 characters]


filetypes: fffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/subsystems/pcie_ss/rtl/synopsys/avmm2axilite

filenames:
[cell repeats an earlier one in this file: 1729 characters]


filenames: bchp_search.vhd/bchp_shift_search.vhd/bchp_shift_searches.vhd
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_bch/synopsys/bch_dec/src/bchp_search


filetypes: ddfffffdffdfdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/subsystems/mem_ss/ip_reset_sim_source

filenames:
  aldec/cadence/common_gui.properties/common_messages.properties/common_params.properties/common_ports.properties/gui.properties/intelfpga/main.tcl/mem_ss_reset_sim_source_hw.tcl/mentor/messages.properties/rtl/synopsys


filetypes: fffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/25g_rsfec/intelfpga

filenames:
[cell repeats an earlier one in this file: 622 characters]


filenames: common/intel_pcie_schd.sv/rx/tx
filetypes: dfdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/avmm_bridge_512/synopsys/schd


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_vfb_sync_ctrl/synopsys


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/cpriphy/cpriphy_ftile/cadence/rtl/ls_pcs

filenames:
[cell repeats an earlier one in this file: 237 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_dil_algorithm/mentor


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/hdl_modules/clock_crossing/synopsys

filenames:
[cell repeats an earlier one in this file: 208 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/aldec/modules/alt_vip_common_mirror


filenames: alt_vip_csc_alg_core.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_csc_alg_core/intelfpga/src_hdl


filetypes: fffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/hbm/ip_asic_soft_logic/intelfpga/rtl

filenames:
[cell repeats an earlier one in this file: 544 characters]


filenames: altera_eth_crc_allocation.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_crc_allocation/cadence


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sdi_ii/sdi_ii_library/sdi_ii_tx_protocol/cadence/src_hdl

filenames:
[cell repeats an earlier one in this file: 178 characters]


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/cadence/rx_rq

filenames:
[cell repeats an earlier one in this file: 259 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_packet_demux/mentor


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_bps_converter/cadence


filenames: altera_eth_tse_nf_phyip_terminator.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_nf_phyip_terminator/cadence


filenames: jimP_rgb32.raw/jimP_rgb32.spc/run.tcl/test.sv
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/verification/example_video_files


filenames: rcfg_s10_overide.sv/rcfg_s10_pcs_ctrl.sv/rcfg_s10_prbs.sv/rcfg_s10_teng.sv/rcfg_s10_txeq_ctrl.sv
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/stratix10/reconfig/intelfpga


filetypes: ffffffffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII/rtl/address_decoder

filenames:
  address_decoder_channel_a10.qsys/address_decoder_channel_ag.qsys/address_decoder_channel_c10.qsys/address_decoder_channel_s10.qsys/address_decoder_multi_channel_a10.qsys/address_decoder_multi_channel_ag.qsys/address_decoder_multi_channel_c10.qsys/address_decoder_multi_channel_s10.qsys/address_decoder_top_a10.qsys/address_decoder_top_ag.qsys/address_decoder_top_c10.qsys/address_decoder_top_s10.qsys/ip_ag/ip_c10/ip_s10


filenames: alt_mem_if_jtag_master_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_mem_if/alt_mem_if_jtag_master


filenames: altera_phylite_s20_cfg_ctrl.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_phylite/ip_s20_cfg_ctrl/mentor/rtl


filetypes: ddfffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/hdl_modules/clock_crossing

filenames:
  aldec/cadence/intel_vvp_binary_to_gray.sv/intel_vvp_clock_crosser.sv/intel_vvp_counter_clock_crosser.sv/intel_vvp_flop_primitive.sv/intel_vvp_gray_to_binary.sv/intel_vvp_ring_clock_crosser.sv/intel_vvp_synchronizer_flop.sv/intelfpga/mentor/synopsys


filenames: aldec/alt_vip_tpg_const_alg_core_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_const_alg_core


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/emif/efficiency_monitor/rtl

filenames:
[cell repeats an earlier one in this file: 295 characters]


filetypes: ffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/soft_switch/sep/rtl_IpRev_1p1p0/intelfpga/sw_config_path

filenames:
[cell repeats an earlier one in this file: 703 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/full_ip/alt_vip_cl_packet_closer/aldec


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/cvg/intel_vvp_fr2lite_core/src_hdl

filenames:
  intel_vvp_fr2lite_core.sdc/intel_vvp_fr2lite_core.sv/intel_vvp_fr2lite_fifo.sv/intel_vvp_fr2lite_pixel_formatter.sv/intel_vvp_fr2lite_stripper.sv


filenames: jtag_basic.tcl/main.tcl/report.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/example_project/hwtest/common


filetypes: fffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/espi_to_lpc_bridge/synopsys

filenames:
[cell repeats an earlier one in this file: 365 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_crs_h_down_algo_comp/synopsys


filenames: alt_vip_common_sample_counter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_sample_counter/src_hdl


filenames: intel_vvp_vfb.c
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_cores/intel_vvp_vfb/sw/src


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40/40g/rtl/top

filenames:
[cell repeats an earlier one in this file: 125 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/aldec/modules/alt_vip_common_pip_merge


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_fir_alg_core/synopsys/src_hdl

filenames:
[cell repeats an earlier one in this file: 249 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/imported/warp/intel_vvp_warp_top/synopsys


filenames: alt_e40_block_distributor.v/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40emu/40g/mentor/rtl/pcs


filenames: alt_aeu_100_pfc_top.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/100g/mentor/rtl/pfc/top


filenames: avst_credit_multiplexer.sv.terp/avst_credit_multiplexer_hw.tcl/credit2ready.sv/credit_manager.sv
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/avalon_st_credit/avst_credit_multiplexer


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_interlaken_hp/ilk_50g_regroup/synopsys

filenames:
[cell repeats an earlier one in this file: 469 characters]


filenames: dynamic_reconfig.cpp/dynamic_reconfig.h
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc3/rtl/dr/cpu_dr/software/alt_ehipc3_dr_cpu


filetypes: dfffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_xcvr_generic/intelfpga/sv

filenames:
[cell repeats an earlier one in this file: 393 characters]


filenames: aldec/c/cadence/intelfpga/matlab/mentor/rtl/spyglass/synopsys
filetypes: ddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/100g/synopsys/rtl/pfc/rx

filenames:
[cell repeats an earlier one in this file: 122 characters]


filetypes: fffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e100s10/hsl23a10/common/synopsys

filenames:
[cell repeats an earlier one in this file: 292 characters]


filetypes: ffffffffffffffffffffffffffffffffdfffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/example_project/common

filenames:
[cell repeats an earlier one in this file: 1478 characters]


filenames: alt_ehipc2_dcfifo_mlab.sv/alt_ehipc2_mlab.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/mentor/rtl/mac_adapter/fm


filenames: avalonstloopback/gen/mon/traffic_controller.tcl
filetypes: dddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G/hwtesting/system_console/traffic_controller


filenames: jtag_basic.tcl/main.tcl/report.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/example_project/hwtest/common


filenames: mgc
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/mentor_vip_ae/common/linux/mgls/etc/cust


filenames: altera_merlin_ahb_slave_agent.sv.terp/altera_merlin_ahb_slave_agent_hw.tcl
filetypes: ff
dirname:
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filenames: alt_e40_block_distributor.v/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
filetypes: ffff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: dfffffffffffddddd
dirname:
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filenames:
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filenames: altera_emif_local_reset_sim_source.sv
filetypes: f
dirname:
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filetypes: fffffffffffffffffffffffffffffffddffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffff
dirname:
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filenames:
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filenames: dec/enc
filetypes: dd
dirname:
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filetypes: dfdfdfdfdfdfdfdfdfdfdf
dirname:
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filenames:
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filetypes: dfffffffffffffffffffffffffffdddffd
dirname:
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filenames:
  aldec/alt_e25_all_sync.v/alt_e25_am0_detect.v/alt_e25_amlock.sv/alt_e25_amp_val.v/alt_e25_cw_mon.sv/alt_e25_desc_ctl.v/alt_e25_gbx_257to80.v/alt_e25_gbx_80to257.v/alt_e25_rs_rx.sv/alt_e25_rs_rx_datapath.sv/alt_e25_rs_tx.sv/alt_e25_rsencdec_out_fifo.v/alt_e25_rsfec_bypass.sv/alt_e25_rsfec_regs_counter_logic.v/alt_e25_rsfec_regs_self_clear_logic.v/alt_e25_rsfec_rx_register_map.v/alt_e25_rsfec_tx_register_map.v/alt_e25_rx_rsfec_regs.v/alt_e25_rx_xcode_amm.v/alt_e25_rxgbx_66to80.sv/alt_e25_sync.v/alt_e25_trcode.v/alt_e25_trdecode.v/alt_e25_tx_rsfec_err_inj.v/alt_e25_tx_rsfec_regs.v/alt_e25_txgbx_80to66.sv/alt_e25_xcode_amm.v/cadence/intelfpga/mentor/rsdec.qsys/rsenc.qsys/synopsys


filenames: altera_xcvr_10gbase_kr.sv
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dirname:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: intel_vvp_axi_st_pipe_bridge.sv
filetypes: f
dirname:
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filenames: FloatToInt.vhd
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffffffffffff
dirname:
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filenames:
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filenames: common_src
filetypes: d
dirname:
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filetypes: fffffffffffffffffffff
dirname:
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: gdr_adapters/soft_logics
filetypes: dd
dirname:
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filetypes: dffffffdddd
dirname:
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filenames:
  aldec/altera_ldpc_wifi_mat.sv/altera_ldpc_wifi_msa.ocp/altera_ldpc_wifi_msa.sv/altera_ldpc_wifi_msa_hw.tcl/altera_ldpc_wifi_msa_layer.sv/altera_ldpc_wifi_msa_layer_multi.sv/cadence/intelfpga/mentor/synopsys


filenames: intel_vvp_mpvdma_cmd_split.sv/intel_vvp_mpvdma_resp_cc.sv
filetypes: ff
dirname:
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filenames: rtl
filetypes: d
dirname:
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filetypes: fffffffffffffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: common/intel_pcie_sep_block_top.sv/sw_config_path/sw_ctrl_path/sw_data_path
filetypes: dfddd
dirname:
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filenames: test-pmd
filetypes: d
dirname:
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filetypes: ffff
dirname:
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filenames:
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filetypes: fffffffff
dirname:
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filenames:
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filetypes: fffff
dirname:
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filenames:
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filenames: intel_vvp_axi_slave_stub.sv
filetypes: f
dirname:
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filetypes: dfdfddffddd
dirname:
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filenames:
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filenames: intel_vvp_mixer_algo_comp.sv/intel_vvp_mixer_algo_comp_align.sv/intel_vvp_mixer_algo_comp_dp.sv
filetypes: fff
dirname:
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filenames: rtl
filetypes: d
dirname:
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filetypes: ffff
dirname:
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filenames:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filenames: alt_vip_interlacer_scheduler.sv
filetypes: f
dirname:
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filetypes: fffffffff
dirname:
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filenames:
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filenames: alt_e40_rx_top_sv.qpf/alt_e40_rx_top_sv.qsf/alt_e40_rx_top_sv.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/40gbe/example/alt_e40_rx_top_sv


filetypes: ffffddd
dirname:
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filenames:
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filenames: altera_customins_master_translator.v.terp/altera_customins_master_translator_hw.tcl
filetypes: ff
dirname:
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filetypes: fff
dirname:
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filenames:
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filenames: pciess_dm_msix_gen_ctrl_csr.v/pciess_hia_csr.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/subsystems/pcie_ss/rtl/synopsys/lite_csr/csr


filenames: alt_vip_csc_alg_core.sv
filetypes: f
dirname:
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filenames: auk_dspip_ctc_ast_block_sink.vhd
filetypes: f
dirname:
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filenames: altera_eth_tse_fifoless_mac.v
filetypes: f
dirname:
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filenames: c10_hdmi2_demo.v.terp/sdc
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/hw_demo/cyclone_10/rtl


filenames: intel_vvp_slave_data_split.sv
filetypes: f
dirname:
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filetypes: ffff
dirname:
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filenames:
  intel_vvp_crs_v_up_algo_comp.sv/intel_vvp_crs_v_up_algo_comp_bl.sv/intel_vvp_crs_v_up_algo_comp_ft.sv/intel_vvp_crs_v_up_algo_comp_nn.sv


filenames: c3_reconfig.c/c3_reconfig.h/flow.c/main.c
filetypes: ffff
dirname:
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filenames: altera_eth_lane_decoder_2_5g.sv
filetypes: f
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_interlaken/alt_ntrlkn_10l_6g/mentor

filenames:
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filenames: alt_e100_phy_pma_a10.v
filetypes: f
dirname:
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filenames: intel_axi2cv/intel_cv2axi
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/tcl_cores


filetypes: fffffff
dirname:
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filenames:
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filetypes: fffdddfdd
dirname:
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filenames:
  altera_xcvr_native_sv.sv/altera_xcvr_native_sv_functions_h.sv/altera_xcvr_native_sv_wizard.lst/intelfpga/mentor/misc/pkgIndex.tcl/presets/tcl


filenames: alt_xcvr_bus_splitter_hw.tcl/alt_xcvr_bus_splitter_top.v
filetypes: ff
dirname:
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filenames: common/modules
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/intelfpga


filenames: altera_voltage_sensor_control.sv/voltage_sensor_avalon_control.sv/voltage_sensor_wrapper.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_voltage_sensor/control/aldec


filenames: alt_vip_vfb_sync_ctrl.sv
filetypes: f
dirname:
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filetypes: dddddddddddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/university_program/audio_video/video

filenames:
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filetypes: fffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 153 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sdi_ii/sdi_ii_library/sdi_ii_tx_phy_mgmt/cadence


filenames: alt_vip_tpg_const_alg_core.ocp/alt_vip_tpg_const_alg_core.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_const_alg_core/src_hdl


filenames: altera_eth_pfc_pause_conversion.v
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filenames: altera_up_avalon_video_stream_router_hw.tcl/hdl
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filenames: altera_eth_pad_inserter.v
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filenames: alt_vip_dil_weave_scheduler.sv
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filenames: altera_eth_pkt_backpressure_control.v
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filenames: ilk_12l_10g_rx_stripe_adapter.v/ilk_12l_10g_tx_stripe_adapter.v
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filenames: alt_e25s10_adapter.v/alt_e25s10_wide_l1if_rx_mux.v/alt_e25s10_wide_l1if_tx.v
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filenames: inc/src
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filenames: intel_vvp_csc.h/intel_vvp_csc_regs.h
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filenames: c3_reconfig.c/c3_reconfig.h/flow.c/main.c
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filenames: rtl
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filenames: rx/top/tx
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filenames: alt_vip_stream_cleaner_alg_core.sv
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filenames: altera_eth_gmii2avst_converter.v
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filenames: altera_eth_gmii_ptp_inserter.v
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filetypes: fffff
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filetypes: fffffffffffffffffffffffffffffffff
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filenames:
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filenames: eth_f_hw_top_avmm_decoder.sv
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filenames: inc/src
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filenames: altera_up_avalon_rs232.h/altera_up_avalon_rs232_regs.h
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filenames: alt_aeu_40_pfc_top.v
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filetypes: fff
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filenames: alt_vip_common_sync_generation.v
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filenames: intel_vvp_snoop_core.sv
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filenames: Vendor_Library_j204c_tx_regmap_2014.ipxact/j204c_tx_regmap.v
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filenames: alt_e100_bridge.v/alt_e100_top.v
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filenames: clock_crossing/pipeline/pixel_shift/slave_interface
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filetypes: ffffffffffffff
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filetypes: fdffffffffffff
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filetypes: ffffdfdfd
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filenames:
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filetypes: ffffffffff
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filenames:
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filenames: aldec/alt_vip_dil_low_angle_algorithm_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filetypes: ffffffffffffff
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filenames:
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filenames: alt_vip_vert_scaler_alg_core.sv
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filenames: intel_pcie_adapter_rx_if.sv/intel_pcie_adapter_stos.sv/intel_pcie_adapter_tx_if.sv
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filenames: alt_vip_dil_scheduler.sv
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filetypes: ffff
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filenames:
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filetypes: ffff
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filenames:
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filenames: src_hdl
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filenames: j204c_rx_regmap.v
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filetypes: fffffff
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filenames:
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filenames: altera_eth_xgmii_tsu.v
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filenames: rtl
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filetypes: ffffffffffffffffffffffffffffffffffffffffff
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filetypes: ffffffffffffffffff
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filenames: alt_vip_dil_weave_scheduler.sv
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filenames: altera_eth_tse_mac.v
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filetypes: ffff
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filetypes: ffff
dirname:
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filetypes: ffff
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filenames:
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filetypes: fffffffff
dirname:
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dirname:
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filetypes: ffff
dirname:
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filenames:
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filenames: altera_cai_reset_synchronizer.v/cai_avalon.v/cai_registers.v/clocked_audio_input.v
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filenames: alt_e40_adapter.v/alt_e40_wide_l2if_rx_mux.v/alt_e40_wide_l2if_tx.v
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dirname:
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filetypes: fffffffffff
dirname:
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filenames:
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filenames: src_hdl
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filenames: rx/tx
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dirname:
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filenames: altera_eth_pkt_backpressure_control.v
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dirname:
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filenames: rx/top/tx
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filetypes: ffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_e2550_avl_filter.v/alt_e25_reset.v
filetypes: ff
dirname:
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filenames: intel_vvp_vvp_to_message_conv.sv/intel_vvp_vvp_to_message_conv_ctrl.sv
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dirname:
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filetypes: ffffffffffff
dirname:
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filenames:
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filenames: src_hdl
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dirname:
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filenames: common/intel_pcie_schd.sv/rx/tx
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dirname:
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filenames: intel_vvp_warp_io.h
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ddfffddd
dirname:
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filenames:
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filetypes: fffffff
dirname:
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filenames:
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filenames: eth_f_dr_hsl_fifo
filetypes: d
dirname:
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filenames: alt_ehipc2_dcfifo_mlab.sv/alt_ehipc2_mlab.sv
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dirname:
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filenames: msim_wave.do/tb_run.tcl
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dirname:
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filetypes: fffffff
dirname:
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filenames:
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filenames: altera_rs_ser_transaction_format_adapter.sv
filetypes: f
dirname:
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filetypes: fffffffffffffffffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffff
dirname:
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filenames:
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filenames: src_hdl
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dirname:
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filenames: altera_eth_packet_underflow_control.v
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dirname:
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filetypes: ffffff
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filenames:
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filenames: dp2p0_txll_vsc.sv/dp2p0_txll_vsc_top.sv
filetypes: ff
dirname:
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filenames: alt_pma_controller_tgx.v
filetypes: f
dirname:
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filetypes: fffffff
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filenames:
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filetypes: fffffffffffff
dirname:
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filenames:
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filetypes: fffdffdffffffffffffffddffffffdffffffff
dirname:
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filenames:
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filenames: rx/tx
filetypes: dd
dirname:
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filetypes: fffffffff
dirname:
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filenames:
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
filetypes: fff
dirname:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: src_hdl
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dirname:
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filenames: altera_xcvr_10gkr_s10/common_src/cpu/design_example/reconfig
filetypes: ddddd
dirname:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: sdi_du_sys.tcl.terp/sdi_rx_phy.tcl.terp
filetypes: ff
dirname:
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filenames: src_hdl
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dirname:
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filetypes: fffffffffffff
dirname:
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filenames:
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filenames: alt_vip_fir_scheduler.sv
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filenames: TrafficController_1588_10g/eth_1588_traffic_controller_top.v
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filenames: src_hdl
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filenames: run_vcs.sh/run_vcsmx.sh
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filetypes: fff
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filenames: bchp_search.vhd/bchp_shift_search.vhd/bchp_shift_searches.vhd
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filenames: csrgen_output
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filenames: alt_mlab.v
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filenames:
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filetypes: ffffffffff
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filenames:
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filenames: alt_aeu_100_pfc_top.v
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filenames: aldec/alt_vip_mix_alg_core_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames:
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filenames: intel_vvp_axi_to_msg.sv
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filenames: edid_ram.tcl.terp/hdmi_rx_top.v.terp
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filenames: ast/csr/efc/eth/kr/mac/pcs/stats
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filenames: src_hdl
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filetypes: ffff
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filenames:
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filetypes: fffffffffffffffff
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filetypes: fffffff
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filenames:
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filenames: alt_vip_common_rotate_mux.sv
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filenames: common/mr42/old_arch/r22sdf
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filetypes: fffffffffffffffffffffffffffffffffffffd
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filenames:
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filenames: alt_vip_scaler_scheduler.sv
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filenames:
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filetypes: ffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: intel_vab_common_slave_interface.sv/intel_vab_ext_interlace_toggle.sv
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filenames: altera_eth_tse_channel_adapter.v
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filetypes: fffffffffffffffffffffffff
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filenames:
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filenames: alt_e40_jtag_avmm.v/alt_e40_reset_controller.v
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filetypes: ffffffffffffffffff
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filenames: alt_vip_cl_packet_dangler.sv
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filenames: altera_16550_uart.sv
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filenames: ethernet_model/mdio
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filenames:
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filenames: ex1_back_to_back_sv/ex1_back_to_back_vhd
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filenames:
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filenames: altera_eth_tse_pcs_pma_nf_lvds.v
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filetypes: ddddddd
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filenames:
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filenames: alt_e40_sys_pll_sv_100/alt_e40_sys_pll_sv_100.qip/alt_e40_sys_pll_sv_100.v
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filenames: src_hdl
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filenames: altera_sl3_phy_adapter.sv/altera_sl3_phy_adapter_c3.sv
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filenames: HAL/altera_up_avalon_accelerometer_spi_hw.tcl/altera_up_avalon_accelerometer_spi_sw.tcl/doc/hdl
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filenames: rtl
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dirname:
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filetypes:
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filenames: intel_pcie_baselimit_compare.sv
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filenames: rtl
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filenames: altera_xcvr_10gkr_a10/common_src/cpu/reconfig/variants
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filetypes: fffffff
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filenames: rtl
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filenames: intel_vvp_tmo.h/intel_vvp_tmo_regs.h
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filenames: altera_eth_packet_overflow_control.v
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filenames: eth_ultra_mac_inc.tcl/eth_ultra_phy_inc.tcl/eth_ultra_stats_inc.tcl/main.tcl
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filenames: rtl
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filenames: altera_reset_controller.v/altera_reset_synchronizer.v
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filenames: altera_pcie_s10_txs.sv
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filenames: rtl
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filenames: alt_xcvr_pipe_phy_mac_tb.sv/alt_xcvr_pipe_phy_mac_tb_hw.tcl
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filetypes: ffff
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filenames: altpciexpav_lite_app.v
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filenames: eth_f_hsl_fifo
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filenames: src_hdl
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filetypes: ffff
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filetypes: ffffffff
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filenames: rtl
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filetypes: fffffffffffffffffffffffffffffffff
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filenames:
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filenames: cust
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filetypes: ffff
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filetypes: ffff
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filenames:
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filetypes: ffffffffff
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filenames:
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dirname:
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filetypes: fffffff
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filenames:
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filenames: altera_dual_boot.v
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filenames: src_hdl
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filenames: src_hdl
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filenames: altera_rs_ser_dec_hw.tcl
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filenames:
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filenames: alt_vip_csc_scheduler.sv
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filenames: intel_vvp_tpg_sdi_algo_comp.sv
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filenames: src_hdl
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filenames: intel_vvp_tpg_sdi_algo_comp.sv
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filenames: alt_ehipc2_clock_mon.sv/alt_ehipc2_jtag_avmm.sv/alt_ehipc2_package.sv
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filenames: chaining_dma
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filenames: alt_ehipc2_serial_pcomp.sv
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dirname:
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filenames: perfq
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filenames: csrgen_output
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dirname:
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filenames: intel_vvp_warp_r2b.sv
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dirname:
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filetypes: fffffff
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filenames:
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filenames: src_hdl
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filetypes: fffff
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filenames:
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filenames: alt_xcvr_bit_slip.sv/alt_xcvr_bit_slip_hw.tcl/alt_xcvr_bit_slip_top.sv
filetypes: fff
dirname:
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filenames: src_hdl
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dirname:
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filetypes: ffffffff
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filenames:
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filenames: common
filetypes: d
dirname:
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filenames: altera_up_altpll.v
filetypes: f
dirname:
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filenames: src_hdl
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filetypes: ffffffffffffff
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filenames:
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filetypes: fffffffffffff
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffffffffddf
dirname:
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filenames:
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filenames: altera_xcvr_pll_avgz_wizard.lst/pkgIndex.tcl/tcl
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filetypes: ffff
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filenames:
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filenames: altera_effmon_axi.sv/altera_effmon_axi_channel.sv/altera_effmon_axi_defs.sv
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filenames: alt_vip_common_scaler_edge_detect.sv
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filenames:
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filenames: alt_ehipc2_alias_csr.sv/alt_ehipc2_avmm_32to8.sv/alt_ehipc2_csr.v
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filenames:
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filenames: alt_vip_warp_addr_gen.ocp/alt_vip_warp_addr_gen.sv/alt_vip_warp_multiply.sv
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filenames: intel_vvp_reset_ready_hold.sv
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filenames: intel_hdmi_rx_core_phy_intf.v/intel_hdmi_rx_oversample.v
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filetypes: fffffffffffffffff
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filenames:
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filetypes: fffffffffffffffff
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filenames:
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filenames: src_hdl
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filenames: intel_vvp_vfb_hw.tcl/sw
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filenames: altera_effmon_axi.sv/altera_effmon_axi_channel.sv/altera_effmon_axi_defs.sv
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filenames: alt_e50s10_kr_rcfg_arb.sv/alt_e50s10_reco_arbiter.v/alt_e50s10_resync_nocut.sv
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filenames: adapter_common
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filenames: src_hdl
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filenames: alt_e100_avalon_top_sv.qpf/alt_e100_avalon_top_sv.qsf/alt_e100_avalon_top_sv.v
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filetypes: ffffff
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filenames:
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filenames: alt_vip_motion_detect.sv
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filetypes: fffddffffff
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filenames:
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filetypes: fffff
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filenames:
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filenames: altera_eth_tse_phyip_terminator.v
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filetypes: fffffffffff
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filetypes: fffffffffffffffff
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filenames:
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filenames: alt_vip_common_delay.sv
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filetypes: fff
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filenames:
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filenames: aldec/alt_vip_message_sink_terminator_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames: alt_vip_fir_scheduler.ocp/alt_vip_fir_scheduler.sv
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filenames: altera_eth_10g_tx_register_map.v
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filenames: ethmon.v/ethmon2.v/ethmon_32.v/top_ethmon32.v
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filenames: chaining_dma
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filetypes: fffffffffff
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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filenames: alt_vip_pip_sop_realign.sv
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filetypes: ffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffff
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filenames:
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filenames: intel_vvp_csc_scheduler.ocp/intel_vvp_csc_scheduler.sv
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filenames: src_hdl
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filenames: auk_dspip_ctc_umts_input.vhd/auk_dspip_ctc_umts_input_ram.vhd/auk_dspip_ctc_umts_itlvr_ram.vhd
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filenames: common/fm/s10
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dirname:
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filenames: alt_vip_tpg_rolling_bars_alg_core.sv
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filenames: altera_eth_mdio.v
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filenames:
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filetypes: fffffffffffffff
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filenames:
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filenames: inc/src
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dirname:
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filenames: intel_pcie_cmp_stg123.sv
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dirname:
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filenames: altera_trace_channel_mapper.sv.terp/altera_trace_channel_mapper_hw.tcl
filetypes: ff
dirname:
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filetypes: fffffff
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filenames:
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filenames: filelist.f/ip_sim.sh/run.tcl/vcs_sim.sh
filetypes: ffff
dirname:
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filenames: basic_avl_tb_top.v
filetypes: f
dirname:
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filenames: aldec/cadence/intelfpga/mentor/soft_pcs/sv_soft_pcs/synopsys
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filenames:
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filenames: aldec/alt_vip_packet_duplicator_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames: altpcie_tbed_sv_hwtcl.v/verilog
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filenames: src_hdl
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filenames: intel_vvp_warp_b2r.sv
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filenames: altera_agilex_config_reset_release_endpoint.v/eth_dr_ed
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filenames: src_hdl
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filetypes: ffff
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filenames:
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filetypes: fffff
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filenames:
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filenames: altera_eth_tse_pcs_pma_phyip.v
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filetypes: fff
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filenames: class.ptf
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filenames: mem_ss_reset_controller.sdc
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filenames: PS2_Controller.pdf
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filenames:
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filenames: src_hdl
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filenames: bchp_syndrome.vhd/bchp_syndromes_sqr.vhd
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filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
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filenames: altera_jesd204_tx_mlpcs_hw.tcl
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filenames: altera_eth_tse_ftile_phyip_terminator.v
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filenames: altera_jesd204_pipeline.v
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filenames: src_hdl
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filenames: tb_run.sh/tb_top.ucli.txt
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filenames:
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filetypes: fffffff
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filenames:
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filetypes: fff
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filenames:
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filenames: altera_rs_ser_transaction_format_adapter.sv
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dirname:
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filetypes: ffffffffffffffffffffffffffff
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filenames:
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filenames: alt_vip_common_to_binary.v
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dirname:
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filetypes: ffffffffff
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filenames:
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filenames: src_hdl
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filetypes: fffff
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filenames:
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filenames: alt_avalon_dc_fifo/alt_avalon_sc_fifo/alt_mge_reset_synchronizer.v/dec/ethernet_traffic_controller
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filenames: alt_vip_mix_scheduler.sv/alt_vip_mix_scheduler_pkg.sv/alt_vip_mix_scheduler_vib_fsm.sv
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filenames: altera_transacto_fabric_hw.tcl/com.altera.transactofabric.jar
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filenames: src_hdl
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filetypes: fffff
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filenames:
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filenames: src_hdl
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filenames: ast/csr/efc/mac/pcs/top
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dirname:
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filenames: alt_hiconnect_av_slv_trans.sv/alt_hiconnect_av_slv_trans_hw.tcl
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dirname:
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filenames: intel_vvp_crs_scheduler.sv/intel_vvp_crs_scheduler_ext.sv/intel_vvp_crs_scheduler_int.sv
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filenames: src_hdl
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dirname:
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filenames: intel_pcie_ReadyDelay.sv
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dirname:
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filetypes: fffffffffffffffff
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filenames:
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filenames: alt_vip_cps_scheduler.sv/alt_vip_cps_scheduler_core.sv
filetypes: ff
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filetypes: fffffffffffffffff
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filenames:
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filenames: alt_e50_fc_top.v/alt_e50_rx_fc.v/alt_e50_tx_fc.v/alt_e50_tx_fc_frame_muxer.v
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dirname:
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filenames: altera_up_avalon_irda/altera_up_avalon_rs232
filetypes: dd
dirname:
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filenames: alt_vip_clipper_scheduler.sv
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filetypes: fffffff
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filenames:
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filetypes: ffffffffff
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filenames:
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filenames: src_hdl
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dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: fff
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filenames:
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filenames: rtl
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dirname:
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filetypes: ffffffffffffffffffffffffff
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filenames:
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filenames: reset_sync_block.v
filetypes: f
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filenames: gxb_rx.tcl.terp/gxb_rx_reset.tcl.terp/gxb_tx.tcl.terp/gxb_tx_fpll.tcl.terp/gxb_tx_reset.tcl.terp
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filenames: intel_vvp_pip_conv_scheduler.sv
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filenames:
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filenames: src_hdl
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dirname:
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filetypes: fffffffffffffffffffffffffff
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filenames:
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filenames: alt_vip_common_edge_detect_chain.sv
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filenames: aldec/alt_vip_cpp_converter_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames: eth_anlt_f_arb.sv
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filenames: avst_credit_w2n.sv.terp/avst_credit_w2n_hw.tcl/avst_credit_w2n_new.sv.terp
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filenames: intel_vvp_csc.qprs/intel_vvp_csc_helper.jar/intel_vvp_csc_hw.tcl/sw
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filenames: altera_eth_tse_regs.h
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filenames: altpcied_sriov_mbox_hw.sv/altpcied_sriov_mbox_hw.tcl
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filenames: altera_rs_ser_transaction_converter.sv
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dirname:
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filetypes: fffffffff
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filenames:
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filenames: aldec/alt_vip_crs_scheduler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/common_tcl
filetypes: fffffffffffffff
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filenames:
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filenames: alt_e50s10_adapt_pma.v/alt_e50s10_eli_jtag.v/alt_e50s10_pll_recal.v/alt_e50s10_reset_controller.v
filetypes: ffff
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filetypes: fffffffffff
dirname:
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filenames:
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filetypes: ffffffffffffffff
dirname:
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filenames:
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filenames: fileset.tcl/xcvrnphy_fmh_hw.tcl
filetypes: ff
dirname:
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filenames: alt_vip_seq_par_convert.sv
filetypes: f
dirname:
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filenames: make_qii_design.tcl/make_qsys.tcl/make_sim_design.tcl/readme.txt
filetypes: ffff
dirname:
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filenames: example_project/rtl
filetypes: dd
dirname:
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filenames: src_hdl
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dirname:
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filetypes: ddffddddddddd
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filenames:
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filenames: inc/intel_vvp_csc_sw.tcl/src
filetypes: dfd
dirname:
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filenames: intel_vvp_msg_to_axi.sv
filetypes: f
dirname:
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filenames: altera_eth_tse_ftile_phyip_terminator.v
filetypes: f
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filetypes: fffffffffff
dirname:
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filenames:
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dirname:
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filenames:
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filetypes:
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filenames: altera_ldpc_docsis_mat.sv/altera_ldpc_docsis_msa.sv
filetypes: ff
dirname:
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filenames: alt_xcvr_12_bus_split.sv/alt_xcvr_12_bus_split_hw.tcl/alt_xcvr_12_bus_split_top.sv
filetypes: fff
dirname:
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filenames: altera_hmcc_mtaps_hw.tcl/altera_hmcc_mtaps_wizard.lst
filetypes: ff
dirname:
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filenames: dec/enc
filetypes: dd
dirname:
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filenames: altera_ldpc_nasa_enc.sv/altera_ldpc_nasa_enc_mat.sv
filetypes: ff
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filetypes: fffffffff
dirname:
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filenames:
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filenames: core
filetypes: d
dirname:
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filetypes: fffffffffffffff
dirname:
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filenames:
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filenames: alt_e40_adapter.v/alt_e40_wide_l2if_rx_mux.v/alt_e40_wide_l2if_tx.v
filetypes: fff
dirname:
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filenames: altera_jesd204_mixed_width_dcfifo.v/altera_jesd204_pcfifo.v
filetypes: ff
dirname:
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filenames: j204c_rx_regmap.v
filetypes: f
dirname:
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filenames: intel_vvp_cvi_remap.sv
filetypes: f
dirname:
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
filetypes: fff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: aldec/alt_vip_vfb_wr_ctrl_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffd
dirname:
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filenames:
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filetypes: fffffffff
dirname:
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filenames:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: hps_bridge_avalon_hw.tcl
filetypes: f
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filenames: alt_vip_crs_scheduler.ocp/alt_vip_crs_scheduler.sv
filetypes: ff
dirname:
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filetypes: fffffffffffff
dirname:
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filenames:
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filenames: cii_workaround/soft_logics/whr_adapters
filetypes: ddd
dirname:
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filenames: common/modules
filetypes: dd
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffff
dirname:
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filenames:
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filetypes: fffffffff
dirname:
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filenames:
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filenames: alt_ehipc3_fm_sl_ptp_chk.sv/axi_lite_bfm.sv/axis_bfm.sv
filetypes: fff
dirname:
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filetypes: fff
dirname:
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filenames:
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filenames: rnr_pcie_ehp_pack/rnr_pcie_ehp_tx_deallocate_ctr.sv/rnr_pcie_ehp_unpack/rnr_pcie_ehp_wrapper.sv
filetypes: dfdf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_rtile/pcie/common/rtl/cadence/soft_wrapper/rnr_pcie_ehp


filenames: alt_vip_common_stream_output.sv
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filetypes: ffffffffff
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filenames: a10/sv
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filenames: alt_e50s10_adapter.v/alt_e50s10_wide_l2if_rx_mux.v/alt_e50s10_wide_l2if_tx.v
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filetypes: ffff
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filetypes: ffffffffffffffffffffffffffffffffffffffff
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filenames: polar5g_codec_param.txt/polar5g_dec_in.txt/polar5g_dec_metric.txt/polar5g_dec_out.txt
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filetypes: ffffffffffffffffffffffffffffff
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filenames: alt_vip_csc_alg_core.sv
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filenames: sl4_f_avmm1.sv/sl4_f_avmm2.sv
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filenames: phylite_loopback.sv/wire_model.sv
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filenames: src_hdl
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filenames: intel_vvp_warp_data/intel_vvp_warp_driver/intel_vvp_warp_mesh
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filenames: ptp
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filenames: alt_aeu_100_ack_skid.v/alt_e100_status_sync.v/alt_e100_sync_arst.v/e100_sync_arst.v/reverse_words.v
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filenames: alt_e40_block_distributor.v/alt_e40_pcs.ocp/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
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filenames: HAL/data_sink_sw.tcl/inc
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filetypes: fffffffffff
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filenames:
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filetypes: dfffdddd
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filenames:
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filenames: src_hdl
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filenames: lib
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
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filetypes: ffffffffffff
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filenames:
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filenames: src_hdl
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filenames: sv_xcvr_custom_native.sv/sv_xcvr_custom_nr.sv
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filenames: altera_avalon_mm_master_bfm_vhdl.vhd/altera_avalon_mm_master_bfm_vhdl_pkg.vhd
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filenames: src_hdl
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filenames: model
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filenames: src_hdl
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filenames: src_hdl
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filenames: alt_vip_clipper_alg_core.ocp/alt_vip_clipper_alg_core.sv
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filenames: soft_wrapper
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filetypes: ffffff
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filenames:
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filenames: alt_xcvr_reconfig/altera_xcvr_interlaken/control_word_decoder.v/header
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dirname:
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filenames: byte_order.v/byte_order_hw.tcl/byte_order_top.v
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filenames: alt_xcvr_latency_measure.v/alt_xcvr_latency_measure_hw.tcl/alt_xcvr_latency_measure_top.v
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filetypes: fff
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filenames:
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filenames: altera_eth_preamble_inserter.v
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filenames: altera_eth_link_fault_generation.v
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filenames: auk_dspip_ctc_umts_out_mem.vhd/auk_dspip_ctc_umts_output.vhd
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filenames: altera_rs_ser_transaction_converter.sv
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filenames: src_hdl
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filenames: altera_eth_10g_rx_register_map.v
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filenames: altera_trace_rom.v/altera_trace_rom_hw.tcl
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filenames:
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filenames: src_hdl
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dirname:
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filetypes:
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filenames: altera_ldpc_wimedia_enc.sv
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filenames: alt_ehipc3_gf_clock_mux.v/alt_ehipc3_kr.sv/alt_ehipc3_resync_nocut.sv/alt_ehipc3_wait_generate.v
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filenames: rtl
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filetypes: fffff
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filenames: alt_xcvr_bitrev_byterev_polinv_hw.tcl/alt_xcvr_bitrev_byterev_polinv_top.v
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filenames: lib
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filetypes: ffffffff
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filetypes: fffffffffffffffffffffdd
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filenames: alt_pma_ch_controller_tgx.v/tgx_ch_reset_ctrl.sv
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filenames: altera_jesd204_phy_hw.tcl
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filetypes: ffffffffffffff
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filetypes: ffffffffffff
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filenames: alt_pma_functions.sv
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filenames: kr4.tcl
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filetypes: fffffff
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filetypes: fffff
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filetypes: fffffff
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filenames: rtl
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filenames:
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
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filenames: altera_avalon_onchip_memory2_hw.tcl/em_onchip_memory2_qsys.pm/generate_rtl.pl
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filenames: verilog
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filenames: pkt_client.tcl
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filenames: altera_eth_tse_conduit_fanout_hw.tcl
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filenames: design_example_rules/dx_altera_xcvr_native_a10_hw.tcl/pkgIndex.tcl
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filetypes: ffffffffffffffff
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filenames:
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filenames: clkmgr_hw.tcl
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filetypes: dfffdddd
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filenames:
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filenames: src_hdl
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filetypes: ffffffffffffffff
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filenames:
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filenames: src_hdl
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filenames: altera_merlin_threadid_splitter_hw.tcl
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dirname:
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filetypes: dfffdddd
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filenames:
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filetypes: fffffffffffffffffff
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filenames:
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filetypes: ffffff
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filenames:
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filetypes: ffffffffff
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filenames:
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filenames: CMakeLists.txt/explog.py
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filenames: rtl
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filenames: src_hdl
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filenames: alt_e40_rx_e4x10_base.v
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filenames: eth_anlt_f_ip.sdc.terp/eth_anlt_f_sip.sv.terp/eth_anlt_f_top.sv.terp
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filenames: alt_vip_guard_bands_scheduler.sv
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filenames: altera_pr_region_controller.svd/altera_pr_region_controller_hw.tcl
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dirname:
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filetypes: fffff
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filenames:
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filetypes: fffff
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filetypes: dffffffffffddddd
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filenames:
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filenames: altera_eth_lane_encoder_2_5g.sv/altera_eth_lane_encoder_2_5g_dfa.sv
filetypes: ff
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filetypes: ddddddd
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filenames:
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filenames: altera_xcvr_cdr_pll_a10.sv
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dirname:
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filenames: alt_vip_common_pip_merge.sv
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filenames: hdl_modules/sv_packages/tcl_components/tcl_cores
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filenames:
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filenames: aldec/cadence/intel_vab_pipelined_mux.sv/intelfpga/mentor/synopsys
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filenames: aldec/cadence/intel_vvp_mm_agent_reset_hold_hw.tcl/intelfpga/mentor/src_hdl/synopsys
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