# filelist

filenames: inc/intel_vvp_warp_data_sw.tcl/src
filetypes: dfd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_cores/intel_vvp_warp/sw/intel_vvp_warp_data


filenames: hdmi20_rx_reg.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_hdmi/src/ipxact/rx/mentor/hdmi20_rx_registers


filenames: alt_xcvr_csr_common_h.sv/alt_xcvr_csr_pcs8g_h.sv/altera_xcvr_functions.sv/sv_xcvr_h.sv
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/seriallite_iii/src/common/header


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/UMTS/intelfpga/src/rtl/interleaver

filenames:
[cell repeats an earlier one in this file: 320 characters]


filenames: crc24b_wdth.v/fifo_crc_cfg.v/ldpc5g_crc_dec.ocp/ldpc5g_crc_dec.sv/ldpc5g_crc_dec_top.sv
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/intel_fpga_ldpcv_5g/src/rtl/ldpcCd


filenames: altera_avalon_st_null_sink_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/sld/trace/core/altera_avalon_st_null_sink


filenames: issp_reset.tcl/jtag_basic.tcl/main.tcl/report.tcl
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/eth_f/example_project/hwtest/common


filenames: auk_dspip_crc24ab.vhd/crc_pkg.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/LTE/aldec/src/rtl/crc


filenames: altera_pcie_s10_rxm.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/aldec/altera_pcie_s10_rxm


filenames: alt_e50s10_adapt_pma.v/alt_e50s10_eli_jtag.v/alt_e50s10_pll_recal.v/alt_e50s10_reset_controller.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_e50s10/50g/synopsys/rtl/top


filenames: altera_eth_mdio.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE/rtl/mdio


filenames: intel_vvp_axi_master.sv/intel_vvp_axi_pipeline_stage.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/hdl_modules/pipeline/mentor


filenames: altera_avalon_fifo.h/altera_avalon_fifo_util.h
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/sopc_builder_ip/altera_avalon_fifo/HAL/inc


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/hdl_modules/clock_crossing/intelfpga

filenames:
[cell repeats an earlier one in this file: 208 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_1588v2/rtl/reconfig

filenames:
[cell repeats an earlier one in this file: 211 characters]


filetypes: ffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/alt_xcvr/altera_xcvr_native_phy/altera_xcvr_native_s20_htile/presets

filenames:
[cell repeats an earlier one in this file: 937 characters]


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10GBASER_RegMode/simulation/ed_sim/models

filenames:
[cell repeats an earlier one in this file: 152 characters]


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_ehipc2/mentor/example_project/common

filenames:
[cell repeats an earlier one in this file: 1580 characters]


filenames: ddr4.tcl/lpddr4.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_hps/dm/ddr/ip_top/mem


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_pcie/soft_switch/ptile/rtl/synopsys/adapter

filenames:
[cell repeats an earlier one in this file: 102 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_message_pipeline_stage


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/component_ip/processing/alt_vip_scaler_alg_core/intelfpga


filetypes: ffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_pcie/ptile/common/rtl_legacy/cadence/whr_adapters/adapter_gen4x8

filenames:
[cell repeats an earlier one in this file: 651 characters]


filenames: altera_rs_ser_bm.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/rs_ii/src/rs_ucores/dec/altera_rs_ser_bm/intelfpga


filenames: hdmi20_rx_reg_wrap.v/hdmi20_rx_registers
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_hdmi/src/ipxact/rx/intelfpga


filetypes: dffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/tse_ucores/altera_eth_tse_nf_phyip_terminator

filenames:
  aldec/altera_eth_tse_nf_phyip_terminator.v/altera_eth_tse_nf_phyip_terminator_hw.tcl/cadence/intelfpga/mentor/synopsys


filenames: intel_vvp_warp_r2b.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_components/imported/warp/intel_vvp_warp_r2b/synopsys/src_hdl


filenames: HAL/altera_up_avalon_rs232_hw.tcl/altera_up_avalon_rs232_sw.tcl/doc/hdl
filetypes: dffdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/university_program/communication/altera_up_avalon_rs232


filenames: alt_pma_functions.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/alt_pma/mentor/source/alt_pma


filenames: altera_eth_rs_mux.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/ethernet_ucore/altera_eth_adapters/altera_eth_rs_mux/aldec


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/altera_pcie_s10_hptxs

filenames:
[cell repeats an earlier one in this file: 172 characters]


filenames: intel_vvp_vvp_to_message_conv.sv/intel_vvp_vvp_to_message_conv_ctrl.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_components/legacy/intel_vvp_vvp_to_message_conv/synopsys/src_hdl


filenames: altera_eth_tse_fifoless_mac.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/tse_ucores/altera_eth_tse_fifoless_mac/intelfpga


filenames: pcs_reg_map.tcl/tse_pcs_inc.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/altera_eth_tse_design_example/tse_ieee1588_s10etile/hardware_test_design/sc/tse_pcs


filenames: alt_vip_common_onehot_to_binary.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_onehot_to_binary/src_hdl


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC/hardware_test_design/common/efifo


filenames: alt_busy_sleep.h/alt_legacy_irq.h/nios2_gmon_data.h
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/nios2_ip/altera_nios2_gen2/HAL/inc/priv


filetypes: dffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/tse_ucores/altera_eth_tse_channel_adapter

filenames:
  aldec/altera_eth_tse_channel_adapter.v/altera_eth_tse_channel_adapter_hw.tcl/cadence/intelfpga/mentor/synopsys


filenames: auk_dspip_ctc_ast_block_sink.vhd
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/LTE/mentor/src/rtl/ast


filenames: auk_dspip_ctc_umts_input.vhd/auk_dspip_ctc_umts_input_ram.vhd/auk_dspip_ctc_umts_itlvr_ram.vhd
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/UMTS/src/rtl/input


filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/hwtesting/system_console/traffic_controller/avalonstloopback


filenames: aldec/cadence/intel_vvp_tmo_core_hw.tcl/intelfpga/mentor/src_hdl/synopsys
filetypes: ddfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_components/imported/tmo/intel_vvp_tmo_core


filenames: alt_vip_crs_422_drop_pad.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/component_ip/processing/alt_vip_crs_422_drop_pad/synopsys/src_hdl


filenames: emif_cal_dbg/emif_effmon/emif_tg_cfg
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/emif/system_console_toolkits


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/asic_emu/intel_rdbk_wrbk/synopsys/sector_level

filenames:
[cell repeats an earlier one in this file: 163 characters]


filetypes: fffffffffffffffffffffffffffffffffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_dp/src/aldec/bitec_dp/tx

filenames:
[cell repeats an earlier one in this file: 906 characters]


filenames: auk_dspip_ctc_decoder_et_top.vhd/auk_dspip_ctc_et_ast_source.vhd/auk_dspip_memory_simple_dual.vhd
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/LTE/aldec/src/rtl/wrapper


filenames: alt_aeu_100_pfc_top.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_eth_ultra/100g/synopsys/rtl/pfc/top


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_components/imported/3d_lut/intel_vvp_3d_lut_core/cadence


filenames: aldec/alt_vip_cvo_scheduler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_cvo_scheduler


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_dp/software/dp_demo_src

filenames:
[cell repeats an earlier one in this file: 103 characters]


filetypes: fffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_ldpc/src/models/matlab_model

filenames:
[cell repeats an earlier one in this file: 750 characters]


filenames: bitec_hdmi_rx_audio.v/bitec_hdmi_rx_audio_clk_gen.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_hdmi/src/hdmi_2.x/rx/synopsys/audio


filenames: core/pkg
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec/cadence/rtl


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_eth_ultra/40g_kr4_a10/reconfig

filenames:
[cell repeats an earlier one in this file: 285 characters]


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/sopc_builder_ip/verification/altera_avalon_mm_slave_bfm/mentor

filenames:
[cell repeats an earlier one in this file: 155 characters]


filenames: intel_vvp_packet_discard.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_packet_discard/synopsys/src_hdl


filenames: intel_pcie_bas.sv/intel_pcie_lite_bas.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_pcie/avmm_bridge_512/cadence/bas


filetypes: dffffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_ldpc/src/ldpc_ucores/dec/altera_ldpc_docsis_msa

filenames:
  aldec/altera_ldpc_docsis_mat.sv/altera_ldpc_docsis_msa.ocp/altera_ldpc_docsis_msa.sv/altera_ldpc_docsis_msa_hw.tcl/cadence/intelfpga/mentor/synopsys


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/ethernet_ucore/altera_eth_frame_decoder/aldec

filenames:
[cell repeats an earlier one in this file: 110 characters]


filenames: chaining_dma
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_pcie/altera_pcie_s10_ed/example_design/verilog


dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_nios2_gen2_rtl
filetypes: dffdddd
filenames:
  aldec/altera_nios2_gen2_rtl_module.ocp/altera_nios2_gen2_rtl_module.sv/cadence/intelfpga/mentor/synopsys


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_hmcc/common/intelfpga

filenames:
  altera_hmcc_a10mlab.v/altera_hmcc_and_r.sv/altera_hmcc_dcore.sv/altera_hmcc_delay_mlab.v/altera_hmcc_delay_regs_ena.v/altera_hmcc_descrambler.sv/altera_hmcc_destriper.sv/altera_hmcc_eq_5_ena.v/altera_hmcc_error.sv/altera_hmcc_extractor.sv/altera_hmcc_flow_packets.sv/altera_hmcc_init_sm.sv/altera_hmcc_irtry.sv/altera_hmcc_lane_aligner.sv/altera_hmcc_lane_swapper.sv/altera_hmcc_mx5r.v/altera_hmcc_neq_5_ena.v/altera_hmcc_null_detector.sv/altera_hmcc_or_r.sv/altera_hmcc_registers.sv/altera_hmcc_retry_pointer.sv/altera_hmcc_retry_sm.sv/altera_hmcc_rrp_pret.sv/altera_hmcc_rrp_register.sv/altera_hmcc_s5mlab.v/altera_hmcc_scfifo_block_ram.sv/altera_hmcc_scfifo_ecc.sv/altera_hmcc_scfifo_mlab.v/altera_hmcc_scrambler.sv/altera_hmcc_striper.sv/altera_hmcc_sync_regs_aclr.v/altera_hmcc_token_counter.sv/altera_hmcc_tx_crc32k_evo64_x10.sv/altera_hmcc_tx_crc32k_evo64_x12.sv/altera_hmcc_tx_crc32k_evo64_x2.sv/altera_hmcc_tx_crc32k_evo64_x4.sv/altera_hmcc_tx_crc32k_evo64_x6.sv/altera_hmcc_tx_crc32k_evo64_x8.sv/altera_hmcc_tx_crc32k_sig128_evo64_x1.sv/altera_hmcc_tx_crc32k_sig128_evo64_x3.sv/altera_hmcc_tx_crc32k_sig128_evo64_x5.sv/altera_hmcc_tx_crc32k_sig128_evo64_x7.sv/altera_hmcc_tx_crc32k_sig64_evo64_x1_head.sv/altera_hmcc_tx_crc32k_sig64_evo64_x3_head.sv/altera_hmcc_tx_crc32k_sig64_evo64_x5_head.sv/altera_hmcc_tx_crc32k_sig64_evo64_x9_head.sv/altera_hmcc_tx_crc32k_sig64_rrp.sv/altera_hmcc_tx_crc32k_sig64_tail.sv/altera_hmcc_word_aligner.sv/altera_hmcc_wys_lut.sv/altera_hmcc_wys_lut_inc.iv


filenames: intel_ftile_transceiver_toolkit.tcl/packages
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/alt_xcvr/toolkit/ftile_transceiver_toolkit/tcl


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ilk/ftile/uflex_ilk_mac/synopsys

filenames:
[cell repeats an earlier one in this file: 2284 characters]


filenames: altera_avalon_clock_reset_source.sv/altera_avalon_clock_reset_source_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/sopc_builder_ip/verification/altera_avalon_clock_reset_source


filenames: altera_up_avalon_video_lt24_controller.v/altera_up_avalon_video_lt24_write_sequencer.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/university_program/audio_video/video/altera_up_avalon_video_lt24_controller/hdl


filenames: altera_rs_ser_syn.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/rs_ii/src/rs_ucores/dec/altera_rs_ser_syn/mentor


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/UMTS/intelfpga/src/rtl/decoder

filenames:
[cell repeats an earlier one in this file: 125 characters]


filetypes: dfffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_dual_boot/altera_dual_boot

filenames:
  aldec/altera_dual_boot.v/altera_dual_boot_hw.tcl/altera_dual_boot_hw_proc.tcl/cadence/intelfpga/mentor/synopsys


filenames: intel_configuration_debug_reset_release_hub_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/sld/conf_reset/conf_reset_hub


filenames: intel_vvp_reset_ready_hold.sv
filetypes: f
dirname:
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filenames: intel_vvp_vvp_to_message_conv.sv/intel_vvp_vvp_to_message_conv_ctrl.sv
filetypes: ff
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: hps_bridge_avalon_hw.tcl
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filetypes: dddddddddddfdddddd
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filenames:
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filetypes: ffffffffff
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filenames:
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filetypes: ffffffffffffffffffffffffff
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filenames:
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filenames: aldec/alt_vip_dil_bob_scheduler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames: aldec/alt_vip_warp_ac_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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dirname:
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filenames: src_hdl
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filenames: system_console
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dirname:
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filenames: alt_ehipc2_mac_enable_avmm.sv/alt_ehipc2_sl_pause.sv/alt_ehipc2_sm_recover.sv
filetypes: fff
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filenames: src_hdl
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: ffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: rx/top/tx
filetypes: ddd
dirname:
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filenames: alt_40gbe_tb.v/kr4_sv/run_aldec.do/run_ncsim.sh/run_vcs.sh/run_vsim.do
filetypes: fdffff
dirname:
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filenames: alt_vip_cl_packet_dangler.sv
filetypes: f
dirname:
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filenames: altera_up_altpll.v
filetypes: f
dirname:
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filetypes: ffffff
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filenames:
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filenames: altera_ldpc_docsis_mat.sv/altera_ldpc_docsis_msa.sv
filetypes: ff
dirname:
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filenames: alt_e100_pma_sv_bridge.v
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dirname:
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filenames: address_decoder_multi_channel_altera_avalon_sc_fifo_1930_pqv24kq.v
filetypes: f
dirname:
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filenames: aldec/alt_vip_crs_422_drop_pad_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
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filetypes: fffffffffffffffffffffffffffff
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filenames:
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filenames: csrgen_output
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/jesd204c_f/src/tx/aldec/rdf


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/audio_ip/clocked_audio_output/cadence


filenames: alt_ehipc2_clock_mon.sv/alt_ehipc2_jtag_avmm.sv/alt_ehipc2_package.sv
filetypes: fff
dirname:
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filenames: altpciexpav_lite_app.v
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: altera_eth_frame_decoder_2_5g.sv
filetypes: f
dirname:
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filenames: alt_e40_rx_top_siv.qpf/alt_e40_rx_top_siv.qsf/alt_e40_rx_top_siv.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/alt_eth_40g_100g/40gbe/example/alt_e40_rx_top_siv


filenames: kr
filetypes: d
dirname:
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filetypes: fffffffffffffffffffffdd
dirname:
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filenames:
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filenames: altera_pcie_sriov_hwtcl.v/bench/hw_devkit/rtl
filetypes: fddd
dirname:
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filetypes: ffffffffffffffff
dirname:
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filenames:
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filetypes: fffffffffddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/axi_switch/ip_responder_core/ip_fm

filenames:
  common_gui.properties/common_messages.properties/common_params.properties/common_ports.properties/enum_defs.tcl/gui.properties/main.tcl/messages.properties/responder_core_fm_hw.tcl/rtl/timing/util.tcl


filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffffffffffff
dirname:
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filenames:
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filenames: alt_vip_scaler_scheduler.sv
filetypes: f
dirname:
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filenames: alt_vip_guard_bands_scheduler.ocp/alt_vip_guard_bands_scheduler.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_guard_bands_scheduler/src_hdl


filetypes: fffffffffffffffffffffffffffffffffffffdffdffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/alt_mem_if/altera_avalon_mm_traffic_generator/pof_avalon_mm_traffic_generator_core

filenames:
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filenames: alt_jtag_csr_master_s10.ip
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: altera_asmi2_xip_controller.sv.terp/altera_asmi2_xip_controller_hw.tcl
filetypes: ff
dirname:
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filenames: alt_vip_common_fifo2.sv
filetypes: f
dirname:
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filenames: alt_vip_common_round_sat.sv
filetypes: f
dirname:
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filenames: rtl
filetypes: d
dirname:
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filetypes: dffffdddd
dirname:
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filenames:
  aldec/altera_eth_timestamp_aligner.ocp/altera_eth_timestamp_aligner.v/altera_eth_timestamp_aligner_hw.tcl/altera_eth_timestamp_aligner_sc_fifo.v/cadence/intelfpga/mentor/synopsys


filenames: fifo_ce_cfg.v/fifo_ce_dat.v/ldpc5g_crc_enc.ocp/ldpc5g_crc_enc.sv/ldpc5g_crc_enc_top.sv
filetypes: fffff
dirname:
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filetypes: ffffffffffffffffffffffffff
dirname:
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filenames:
  intel_pcie_ErrTrig_MsgGen.sv/intel_pcie_ErrorLog.sv/intel_pcie_Sb_Intf_arbiter.sv/intel_pcie_Sb_Intf_top.sv/intel_pcie_app_err_intf.sv/intel_pcie_bpc_error_detect.sv/intel_pcie_byteCount.sv/intel_pcie_cfg.sv/intel_pcie_cfg_initAddr_encoder.sv/intel_pcie_cfg_init_perPF.sv/intel_pcie_cfg_init_top.sv/intel_pcie_cfg_init_vf_memory.sv/intel_pcie_cfg_memory.sv/intel_pcie_cfg_msg.sv/intel_pcie_cfg_update.sv/intel_pcie_cfg_vf_memory.sv/intel_pcie_ep_shadow_register.sv/intel_pcie_illegal_writeCheck.sv/intel_pcie_maskGen.sv/intel_pcie_msi_sm.sv/intel_pcie_reg_access.sv/intel_pcie_sw_bpc_top.sv/intel_pcie_sw_hot_plug.sv/intel_pcie_sw_shadow_register.sv/intel_pcie_ur_gen.sv/intel_pcie_vf_shadow_register.sv


filenames: mem_ss_base_csr_regs.sv/mem_ss_csr_top.sv
filetypes: ff
dirname:
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filenames: altera_xcvr_cdr_pll_s20.sv.terp/reconfig_settings.txt.terp
filetypes: ff
dirname:
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filenames: altera_tristate_conduit_bridge.sv.terp/altera_tristate_conduit_bridge_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/merlin/altera_tristate_conduit_bridge


filenames: intel_jesd204c_phy_adapter_c3.v/intel_jesd204c_signal_adapter.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_jesd204c/src/top/cadence


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/UMTS/cadence/src


filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_e100s10/example_project/hwtest/altera/optical_module


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_e50s10/50g/mentor/rtl/pcs

filenames:
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filenames: alt_vip_common_stream_output.sv
filetypes: f
dirname:
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filenames: alt_vip_common_data_by_line_rearrange.sv
filetypes: f
dirname:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: alt_vip_video_input_bridge_resp.sv
filetypes: f
dirname:
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filetypes: dffffffffffffffffffffddddd
dirname:
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filenames:
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filenames: aux_mux.tcl.terp/aux_retransmit.v/aux_src_gen.v/ext_aux_filter.v/rxtx_link.v/scfifo_vid.tcl.terp
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filenames: altera_phylite_cfg_ctrl.sv
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filenames: altera_eth_default_slave.v
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filenames: libbtc_dprx_syslib.a
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filenames: altera_avalon_transacto.sv/altera_avalon_transacto_hw.tcl
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filenames: alt_e40_phy_pma_a10.v
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filetypes: ffff
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filenames: src_hdl
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filetypes: ffffffffffffffffffff
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filenames:
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filenames: src_hdl
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filenames: altera_up_altpll_hw.tcl/hdl
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filetypes: fffffffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
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filetypes: ffffffffffffffffffff
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filenames:
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filetypes: fffffffff
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filenames:
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filenames: run_vcs.sh/run_vcsmx.sh
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filenames: src_hdl
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filenames: altpcie_s10_tbed_bfm_hwtcl.v/altpcie_s10_tbed_hwtcl.v/verilog
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filenames:
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filenames: ilk_24l_6g_rx_stripe_adapter.v/ilk_24l_6g_tx_stripe_adapter.v
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dirname:
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filenames: intel_pcie_baselimit_compare.sv
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filetypes: dffffffffffdddd
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filenames:
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filenames:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_dp/src
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dirname:
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filenames: altera_eth_timestamp_aligner.v/altera_eth_timestamp_aligner_sc_fifo.v
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filenames: hdmi20_tx_reg.v
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filenames: altera_pcie_avgz_hip_ast_hw.tcl/altera_pcie_avgz_hip_ast_wizard.lst
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filenames: adapter/common/kr4_sv/mac/phy/top
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filenames: intel_vvp_slave_data_split.sv
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filenames: altera_avalon_reset_source.sv/altera_avalon_reset_source.vhd/altera_avalon_reset_source_hw.tcl
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filenames: eth_ex_100g_a10.qpf/eth_ex_100g_a10.qsf/eth_ex_100g_a10.v
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_sl3/src/phy/adapter
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filenames: alt_e100_mac.v/common/csr/rx/tx
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filenames: intel_hdmi_edid_hdlg.v/intel_hdmi_hpd_hdlg.v/intel_hdmi_ltp_chk.v
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filetypes: ffffffffffffffffffffffffffff
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filenames:
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filenames: vcs
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filenames: alt_xcvr_avmm_read.sv/alt_xcvr_avmm_read_hw.tcl/alt_xcvr_avmm_read_top.sv
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filetypes: fffff
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filenames:
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filenames: alt_vip_video_output_bridge.sv
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filenames: alt_vip_warp_line_store.sv
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filenames: rtl
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filenames: intel_vvp_tmo_hw.tcl/sw
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filetypes: ffffffff
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filetypes: fffffdfdd
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filetypes: ffffffffffffffff
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filenames:
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filenames: altera_generic_tristate_controller.qprs/altera_generic_tristate_controller_hw.tcl
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filenames: c3_reconfig.c/c3_reconfig.h/flow.c/main.c
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filenames: common
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filenames: altera_xcvr_10gbase_kr_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl
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filenames:
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filenames: src_hdl
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filetypes: fffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffffffffff
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filenames:
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filetypes: fffffff
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filenames:
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filenames: eth_params.tcl.terp
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
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filetypes: ffffffffffffff
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffffffffffffff
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filenames:
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filetypes: dffffffffffffffffffdddd
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filenames:
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filenames:
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filenames: altera_avalon_dma_256_hwtcl.v
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filenames:
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filenames: src_hdl
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filenames: alt_e2550_avl_filter.v/alt_e25s10_reset.v/s10_rst_ctrl.v
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filenames: altera_eth_preamble_inserter.v
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filenames: altera_sync_reset_shift_register.sv/altera_sync_reset_shift_register_hw.tcl
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filenames: alt_vip_guard_bands_alg_core.sv
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filenames: altera_up_avalon_video_alpha_blender_hw.tcl/hdl
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filenames:
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filenames: aldec/alt_vip_cl_packet_closer_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames: intel_vvp_pkt_demux.sv
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filenames: alt_ntrlkn_oob_flow_tx.v
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filenames: model
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filenames:
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filenames: altera_emif_ddrt_model.sv/altera_emif_ddrt_model_base.sv/altera_emif_simbus.sv
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filenames:
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filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
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filenames: aldec/cadence/intelfpga/mentor/s5mlab.v/synopsys
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filenames: bchp_search.vhd/bchp_shift_search.vhd/bchp_shift_searches.vhd
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filenames: fifo_ce_cfg.v/fifo_ce_dat.v/ldpc5g_crc_enc.sv/ldpc5g_crc_enc_top.sv
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filenames: run_xcelium.sh/xcelium_in_cmd.txt
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filenames:
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filenames: alt_e25s10_otn_tb.sv/run_otn_tb.sh
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filenames: alt_aeu_40/kr4/optical_module/pkt_client/sval_top
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filenames: src_hdl
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filenames: rtl
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filenames: auk_dspip_crc24ab.vhd/crc_pkg.vhd
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filenames:
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filenames: eth_f_sl_adapter_rx.sv/eth_f_sl_adapter_tx.sv/eth_f_sl_avalon_to_if.sv/eth_f_sl_if_to_avalon.sv
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filenames: altera_emif_tg_afi_lpddr3_top.sv
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filenames:
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filenames: alt_vip_warp_addr_gen.sv/alt_vip_warp_multiply.sv
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filenames: top_hw.v
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dirname:
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filenames: altera_avalon_mm_bridge.v.terp/altera_avalon_mm_bridge_hw.tcl
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_jesd204c/src/rx
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filenames: ast/csr/efc/mac/pcs/top
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filenames: alt_e2550_avl_filter.v/alt_e25_reset.v
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filenames: src_hdl
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filenames: altera_eth_tse_channel_adapter.v
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filenames: altera_eth_lane_decoder_2_5g.sv
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filenames: altera_ldpc_docsis_mat.sv/altera_ldpc_docsis_msa.sv
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filenames: aldec/alt_vip_dil_sobel_scheduler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filetypes: ffff
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filenames:
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filenames: altera_rs_ser_search.sv
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filenames: alt_vip_common_sync_generation.v
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dirname:
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filenames: intel_pcie_baselimit_compare.sv
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dirname:
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filenames: sdrctl_hw.tcl
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dirname:
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filenames:
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filenames: csrgen_output
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dirname:
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filenames: core/pkg
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dirname:
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filetypes: fdfffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: ethernet_model/mdio
filetypes: dd
dirname:
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filetypes: fffffffffffdd
dirname:
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filenames:
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filetypes: ffff
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filenames:
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filenames: src
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dirname:
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filenames: alt_vip_clipper_scheduler.sv
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: ff
dirname:
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filenames:
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filenames: altera_avalon_packets_to_master.v/altera_avalon_packets_to_master_hw.tcl
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: ffffffffffffffffffffffffffffffff
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filenames:
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filenames: intel_vvp_reset_ready_hold.sv
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dirname:
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filetypes: fffffffffffff
dirname:
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filenames:
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filenames: tb_run.sh/xcelium_wave.tcl
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dirname:
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filetypes: fffffffffff
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filenames:
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filenames: alt_vip_dil_bob_scheduler.sv
filetypes: f
dirname:
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filenames: alt_vip_vfb_sync_ctrl.sv
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dirname:
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filenames: alt_aeu_40/kr4/optical_module/pkt_client/sval_top
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: fffffffffffffffffff
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filenames:
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filenames: alt_ntrlkn_oob_flow_rx.v/alt_ntrlkn_oob_flow_rx_dcfifo.v
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dirname:
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filetypes: ffffffffff
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filenames:
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filenames: filelist.f/ip_sim.sh/run.tcl/vcs_sim.sh
filetypes: ffff
dirname:
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filetypes: ffffffffffff
dirname:
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filenames:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: rtl
filetypes: d
dirname:
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filenames: hps_clk_src_hw.tcl
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dirname:
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filenames: src_hdl
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dirname:
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filenames: tb_run.sh/xcelium_wave.tcl
filetypes: ff
dirname:
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filenames: intel_vvp_common_simple_dpram.sv
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dirname:
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filenames: src_hdl
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dirname:
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filenames: altera_eth_lane_decoder_2_5g.sv
filetypes: f
dirname:
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filetypes: ffffffffff
dirname:
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filenames:
  dcfifo_aclr_filter.v/dcfifo_alt_xcvr_resync_std.sv/dcfifo_altera_std_synchronizer_nocut.v/dcfifo_eq_5_ena.v/dcfifo_fmmlab.v/dcfifo_gray_cntr_5_sl.v/dcfifo_gray_to_bin_5.v/dcfifo_mlab.v/dcfifo_neq_5_ena.v/dcfifo_wys_lut.v


filenames: dec/enc
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dirname:
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filenames: base_stp_1G2p5G10GPHY.xml.txt/build_stp.tcl
filetypes: ff
dirname:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_adv_seu_detection
filetypes: fdfffffdddd
filenames:
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filetypes: ffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_xcvr_hw_if.sv/alt_xcvr_hw_if_hw.tcl
filetypes: ff
dirname:
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filetypes: ffffff
dirname:
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filenames:
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filenames: altera_eth_pause_controller.v/altera_eth_pause_ctrl_gen.v/altera_eth_pause_gen.v
filetypes: fff
dirname:
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filenames: altera_avalon_altpll_reconfig_hw.tcl
filetypes: f
dirname:
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filenames: alt_e40_phy.v/csr/pcs
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dirname:
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filenames: main.tcl/main_ml.tcl/reg_map_inc.tcl
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filenames: run_vsim.do
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filenames: altera_sdm_fpga_core_rst.sv/altera_sdm_fpga_core_rst_hw.tcl
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filetypes: ddd
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filenames: alt_vip_common_sad_tree.sv
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filetypes: ffff
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filetypes: ff
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filenames: alt_e40_jtag_avmm.v/alt_e40_rcfg_arb.sv/alt_e40_reset_controller.v
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filenames: src_hdl
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filenames:
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filenames: src_hdl
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filetypes: ffff
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filenames: alt_e40_e_reco/alt_e40_e_reco.qip/alt_e40_e_reco.v
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filenames: altera_avalon_jtag_uart_regs.h
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filetypes: fffff
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filenames:
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filenames: automap.ptf/class.ptf/netlist
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filenames:
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filenames: src_hdl
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filenames: csrgen_output
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filenames: bitec_hdmi_tx_audio.v/bitec_hdmi_tx_audio_mux.v
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filenames: alt_e40_block_distributor.v/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
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filenames: vcs
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filenames:
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filenames: intel_common_axis_shim.v
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filenames:
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filenames: alt_e40_lut6.v/alt_e40_mlab.sv
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filenames: src_hdl
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filenames: altera_ldpc_nasa_enc.sv/altera_ldpc_nasa_enc_mat.sv
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filenames:
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filenames: optics_control.v/two_wire_control.v/two_wire_control_tb.sv/two_wire_iopad.v
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filenames: altpcie_a10_hip_ast_translator.sv/altpcie_ast_translator.sv
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filenames: altera_jesd204_pipeline.v
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filenames: src_hdl
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filenames: altpciexpav_lite_app.v
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filenames: alt_e40_block_distributor.v/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
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filenames: alt_vip_common_stream_input.v
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filenames: inc/src
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filenames: rtl
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filetypes: ddffffffffffffddddd
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filenames:
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filetypes: ffffffffffffffffff
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filetypes: fffffffffffffffffffffffffffffffffff
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filenames:
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dirname:
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filenames: src_hdl
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filetypes: ffffff
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filenames:
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filetypes: ffffffffff
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filetypes: dffffffffffd
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filenames: altpcie_pcie_reconfig_bridge.v/altpcie_pll_100_250.v/altpcie_pll_125_250.v/altpcie_rs_serdes.v
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filenames:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/altera_xcvr_8g_custom/sv
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filenames: scripts/src
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dirname:
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filenames: altera_msi_to_gic_gen.sv/altera_msi_to_gic_gen_fifo.v
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filetypes: ffffffffff
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filetypes: fffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffffffff
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filenames:
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filenames: a10_dp_harness.sv.terp/clk_gen.v/freq_check.v/rx_freq_check.v/tx_freq_check.v/vga_driver.v
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dirname:
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filenames: altera_hsrs_testbench.tcl/altera_hsrs_utilities.tcl/avalon_streaming_util.tcl
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dirname:
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filenames: src_hdl
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dirname:
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filenames: aldec/cadence/intel_vvp_axi_slave_stub_hw.tcl/intelfpga/mentor/src_hdl/synopsys
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dirname:
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filenames: intel_vvp_axi4_stream_pkg.sv/intel_vvp_verif_pkg.sv
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dirname:
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filetypes: fffffffffffffff
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filenames:
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filenames: bitec_hdmi_tx_audio.v/bitec_hdmi_tx_audio_mux.v
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dirname:
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filenames:
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filenames: alt_vip_cl_interlacer_hw.tcl/alt_vip_cl_interlacer_sw.tcl
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filenames: alt_aeu_40/kr4/optical_module/pkt_client/sval_top
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
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filetypes: ffffffffffffffffffff
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filenames:
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filenames: hyper_opt_OFF_pkg.vhd/hyper_opt_ON_pkg.vhd
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filetypes: fffffffff
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filetypes: fffffff
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filenames:
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filenames: alt_e100_sys_pll_sv_100/alt_e100_sys_pll_sv_100.qip/alt_e100_sys_pll_sv_100.v
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dirname:
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filenames: common/hwtest/templates
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filenames: intel_pcie_adapter_rx_if.sv/intel_pcie_adapter_stos.sv/intel_pcie_adapter_tx_if.sv
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_pcie/ptile/common/rtl_legacy/aldec/whr_adapters/adapter_single_segment


filetypes: fffffffff
dirname:
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filenames:
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filetypes: ffffff
dirname:
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filenames:
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filenames: altera_up_avalon_reset_from_locked_signal.v
filetypes: f
dirname:
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filenames: ast/efc/eth/lib/mac/pcs/pfc/pma/pma.a10/ptp
filetypes: dddddddddd
dirname:
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filenames: altera_oct.sv/altera_oct_um_fsm.sv
filetypes: ff
dirname:
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filetypes: fffffffffffff
dirname:
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filenames:
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filetypes: fffffffffff
dirname:
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filenames:
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filenames: sdi_ii_tx_ce_gen.v/sdi_ii_tx_phy_mgmt.v/sdi_ii_tx_sample.v/sdi_ii_tx_xcvr_interface.v
filetypes: ffff
dirname:
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filenames: rtl
filetypes: d
dirname:
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filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/dsp/altera_turbo/LTE/src/testbench/td_dec

filenames:
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filenames: tb_run.sh/tb_top.ucli.txt/vcs_wave.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII/simulation/ed_sim/synopsys/vcs


filenames: altera_hbm_mem.sv/altera_hbm_model.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/hbm/ip_hbm_model/intelfpga/rtl


filenames: dma_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/hps/hard_peripheral_logical_view/dma


filenames: alt_vip_clipper_alg_core.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/component_ip/processing/alt_vip_clipper_alg_core/synopsys/src_hdl


filetypes: fddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ethernet/altera_eth_tse/example_project/common/hw/dec/top

filenames:
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filenames: altera_eth_pfc_pause_conversion.v
filetypes: f
dirname:
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filetypes: fffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 228 characters]


filetypes: ffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/kr4_sv/intelfpga/common_src

filenames:
[cell repeats an earlier one in this file: 514 characters]


filenames: alt_vip_dil_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_dil_scheduler/intelfpga/src_hdl


filenames: intel_vvp_reset_sync.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_reset_sync/cadence/src_hdl


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/ilk/ftile/ilk_f_efifo/mentor

filenames:
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filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.1.0/QuartusPrimePro/21.3/ip/altera/intel_pcie/mcdma/src/mentor/hip_intf

filenames:
[cell repeats an earlier one in this file: 169 characters]


