# filelist

filetypes: ffdff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_sriov_dma_avmm

filenames:
[cell repeats an earlier one in this file: 151 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_fifo_core/cadence


filetypes: ddfffffffffffdffddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_hip_ast

filenames:
  aldec/altera_pcie_s10_512_adapter/altera_pcie_s10_c2e_hip_ast.v.terp/altera_pcie_s10_c2e_hip_ast_pipen1b.v.terp/altera_pcie_s10_hip_ast.v.terp/altera_pcie_s10_hip_ast_fileset.tcl/altera_pcie_s10_hip_ast_hw.tcl/altera_pcie_s10_hip_ast_interfaces.tcl/altera_pcie_s10_hip_ast_module.tcl/altera_pcie_s10_hip_ast_parameters.tcl/altera_pcie_s10_hip_ast_pipen1b.v.terp/altera_pcie_s10_hip_ast_pllnphy.v.terp/altera_pcie_s10_hip_common.tcl/altera_pcie_s10_link_inspector/altera_pcie_s10_reset_delay_sync.v/altera_pcie_s10_sc_bitsync.v/altera_pcie_s10_sriov_bridge/cadence/intelfpga/mentor/nd/stp/synopsys


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/aldec/altera_pcie_s10_dma_controller

filenames:
[cell repeats an earlier one in this file: 224 characters]


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/seriallite_iii/example/example_design/top

filenames:
[cell repeats an earlier one in this file: 362 characters]


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_turbo/LTE/aldec/src/rtl/encoder

filenames:
[cell repeats an earlier one in this file: 278 characters]


filenames: IrDA.pdf
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/university_program/communication/altera_up_avalon_irda/doc


filenames: alt_vip_common_sop_align.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/cadence/modules/alt_vip_common_sop_align/src_hdl


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_highspeed_rs/src/reference_designs/25_100g_ethernet/enc/cadence

filenames:
[cell repeats an earlier one in this file: 160 characters]


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_dp/src/displayport2p0/tx/txll/common/dp2p0_txll_lib/dp2p0_txll_lib_primitives

filenames:
  dp2p0_txll_ipbus_reg_rsro.sv/dp2p0_txll_lib_data_bus_sync.sdc/dp2p0_txll_lib_data_bus_sync.sv/dp2p0_txll_lib_edelay.sv/dp2p0_txll_lib_ff_decoder.sv/dp2p0_txll_lib_l2h_impgen.sv/dp2p0_txll_lib_mcrc.sv/dp2p0_txll_lib_sdelay.sv/dp2p0_txll_lib_tdelay.sv/dp2p0_txll_resolution_calculator.sv


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/schedulers/intel_vvp_crs_h_cmd_gen/aldec


filetypes: dfddfdfdffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE/hwtesting/system_console

filenames:
[cell repeats an earlier one in this file: 151 characters]


filenames: intel_vvp_tpg_const_algo_comp.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_tpg_const_algo_comp/cadence/src_hdl


filenames: ex1_back_to_back_sv.xml/filters.xml/preferences.xml
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/mentor_vip_ae/axi4lite/qsys-examples/ex1_back_to_back_sv/.qsys_edit


filenames: CMakeLists.txt
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_native_phy/directphy_f/verif/gdr_altuvm/tb/model/gdr_rsfec_c_model/mersinvald/RS-m


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_rolling_bars_alg_core/synopsys


filenames: eth_f_altera_std_synchronizer_nocut.v/eth_f_reset_synchronizer.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII/rtl/eth_f_reset_sync


filenames: altera_eth_packet_formatter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_packet_formatter/mentor


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/MAC/adapters/altera_eth_xgmii_data_format_adapter

filenames:
[cell repeats an earlier one in this file: 113 characters]


filetypes: fffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc3_fm/example_project/templates

filenames:
[cell repeats an earlier one in this file: 1692 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_slave_data_split/intelfpga


filetypes: dffffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_voltage_sensor/sample_store

filenames:
  aldec/altera_voltage_sensor_sample_store.sv/altera_voltage_sensor_sample_store_hw.tcl/altera_voltage_sensor_sample_store_ram.sv/altera_voltage_sensor_sample_store_register.sv/cadence/intelfpga/mentor/synopsys


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40emu/example_project/common

filenames:
[cell repeats an earlier one in this file: 1520 characters]


filenames: altera_rs_ser_bm.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/rs_ii/src/rs_ucores/dec/altera_rs_ser_bm/intelfpga


filenames: altera_eth_tse_nd_phyip_terminator.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_nd_phyip_terminator/intelfpga


filenames: source
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_pll/altera_xcvr_fpll_vi/intelfpga


filenames: hdmi_tx_top.v.terp
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/hw_demo/stratix_10/rtl/hdmi_tx


filenames: alt_xcvr_bus_concat_hw.tcl/alt_xcvr_bus_concat_top.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_bus_concat


filenames: aldec/alt_vip_cl_packet_closer_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/full_ip/alt_vip_cl_packet_closer


filenames: alt_vip_mix_scheduler.sv/alt_vip_mix_scheduler_pkg.sv/alt_vip_mix_scheduler_vib_fsm.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_mix_scheduler/cadence/src_hdl


filetypes: fffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_ed/ast2avmm_bridge_256

filenames:
[cell repeats an earlier one in this file: 165 characters]


filetypes: ffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/mac/synopsys/tx

filenames:
[cell repeats an earlier one in this file: 333 characters]


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_uflex_interlaken/uflex_ilk_mac/mentor

filenames:
[cell repeats an earlier one in this file: 2284 characters]


filenames: av_xcvr_10gbaser_native.sv/av_xcvr_10gbaser_nr.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_10gbaser_phy/av/intelfpga


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_cic_ii/mentor/src


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/intelfpga/altera_pcie_s10_hprxm

filenames:
[cell repeats an earlier one in this file: 243 characters]


filetypes: dffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_channel_adapter

filenames:
  aldec/altera_eth_tse_channel_adapter.v/altera_eth_tse_channel_adapter_hw.tcl/cadence/intelfpga/mentor/synopsys


filenames: pkgIndex.tcl/tcl/terp
filetypes: fdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_pll/xcvr_fpll_fmh


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/40g/cadence


filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII/hwtesting/system_console_fm/traffic_controller/avalonstloopback


filetypes: ffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl_legacy/aldec/soft_logics

filenames:
[cell repeats an earlier one in this file: 428 characters]


filenames: altera_sld_jtag_mux_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sld/jtag/altera_sld_jtag_mux


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/axi_intf/common/intelfpga

filenames:
  intel_common_axis_shim.v/intel_hdmi_cdc.v/intel_hdmi_cdc_pulse.v/intel_hdmi_dcfifo.v/intel_hdmi_scfifo.v


filenames: src
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_fft_ii/intelfpga


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_crs_h_down_algo_comp/cadence


filenames: altera_up_avalon_video_pixel_buffer_dma.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/university_program/audio_video/video/altera_up_avalon_video_pixel_buffer_dma/HAL/inc


filenames: rcfg_s10_overide.sv/rcfg_s10_pcs_ctrl.sv/rcfg_s10_prbs.sv/rcfg_s10_teng.sv/rcfg_s10_txeq_ctrl.sv
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/stratix10/reconfig/mentor


filenames: gen_ed_sim.tcl/main_rule.tcl/main_tb_rule.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_native_phy/directphy_f/design_example_rules


filetypes: ffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_fft_ii/c_model/r22sdf

filenames:
[cell repeats an earlier one in this file: 406 characters]


filenames: ldpc_decoder_pkg.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec/aldec/rtl/pkg


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_snoop_core/aldec


filenames: altera_rs_ser_correct.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/rs_ii/src/rs_ucores/dec/altera_rs_ser_correct/synopsys


filenames: alt_cpriphy_c3_avmm_32to8.sv/alt_cpriphy_c3_csr.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/cpriphy/alt_cpriphy_c3/rtl/csr


filetypes: ffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/aldec/msix_wb_ctrl

filenames:
  intel_qdma_desc_wb_tlp_gen.sv/intel_qdma_msix_controller.sv/intel_qdma_msix_irq_arbiter.sv/intel_qdma_msix_irq_processor.sv/intel_qdma_msix_package.sv/intel_qdma_msix_pba_table.sv/intel_qdma_msix_sdp_ram.sv/intel_qdma_msix_set_clr_rd.sv/intel_qdma_msix_st_arbiter.sv/intel_qdma_msix_tdp_ram.sv/intel_qdma_msix_tlp_arbiter.sv/intel_qdma_msix_tlp_gen.sv


filenames: hmcc_example.qpf/hmcc_example.qsf.terp/hmcc_example.sdc/sysconsole_testbench.tcl
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hmcc_mtaps/a10_example_design/par


filenames: altera_up_RGB_to_YCrCb_converter.v/altera_up_YCrCb_to_RGB_converter.v/altera_up_avalon_video_csc.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/university_program/audio_video/video/altera_up_avalon_video_csc/hdl


filenames: intel_vvp_mpvdma_cmd_split.sv/intel_vvp_mpvdma_resp_cc.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/hdl_modules/mpvdma_common/intelfpga


filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/40g/rtl/efc


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/50g/cadence/rtl/pcs

filenames:
[cell repeats an earlier one in this file: 116 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_horiz_scaler_algo_comp/aldec


filetypes: dddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components

filenames:
  intel_vvp_clipper_algo_comp/intel_vvp_crs_h_down_algo_comp/intel_vvp_crs_h_up_algo_comp/intel_vvp_crs_v_down_algo_comp/intel_vvp_crs_v_up_algo_comp/intel_vvp_csc_algo_comp/intel_vvp_guard_bands_algo_comp/intel_vvp_horiz_scaler_algo_comp/intel_vvp_mixer_algo_comp/intel_vvp_round_sat_algo_comp/intel_vvp_tpg_bars_algo_comp/intel_vvp_tpg_const_algo_comp/intel_vvp_tpg_sdi_algo_comp/intel_vvp_vert_scaler_algo_comp


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/50g/mentor/rtl/csr

filenames:
[cell repeats an earlier one in this file: 193 characters]


filenames: mge_rcfg_inc.tcl/mge_rcfg_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/hwtesting/system_console/rcfg


filenames: alt_e100_e_reco_base.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/phy/pma_siv/alt_e100_e_reco


filenames: alt_hiconnect_axi_trans.sv/alt_hiconnect_axi_trans_hw.tcl/axi_interface.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/iconnect/alt_hiconnect_axi_trans


filenames: intel_vvp_vvp_to_message_conv.sv/intel_vvp_vvp_to_message_conv_ctrl.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/legacy/intel_vvp_vvp_to_message_conv/aldec/src_hdl


filenames: intel_vvp_pkt_demux.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_pkt_demux/aldec/src_hdl


filenames: intel_vvp_msg_to_axi.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/legacy/intel_vvp_msg_to_axi/src_hdl


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/intelfpga/wrdm

filenames:
  intel_pcie_ext_60bit_adder.sv/intel_pcie_ext_62bit_adder.sv/intel_pcie_ext_avmm_translator_512.sv/intel_pcie_ext_pipelined_57_6_adder.sv/intel_pcie_ext_wdm_avmm_sm_512.sv/intel_pcie_ext_wdm_data_aligner.sv/intel_pcie_ext_wdm_destn_address_generator.sv/intel_pcie_ext_wdm_input_stage_512.sv/intel_pcie_ext_wdm_packet_generator_512.sv/intel_pcie_ext_wdm_scfifo.sv/intel_pcie_ext_write_data_mover_512.sv


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE_1588v2/rtl/eth_traffic_controller/eth_1588_traffic_controller/TrafficController_1588_10g

filenames:
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filenames:
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filenames: WarpData.h/WarpDataContext.h/WarpDataGenerator.h/WarpDataHelper.h/WarpMesh.h
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filenames:
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filetypes: dfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffdddd
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filenames: gxb_rx.tcl.terp/gxb_rx_reset.tcl.terp/gxb_tx.tcl.terp/gxb_tx_fpll.tcl.terp/gxb_tx_reset.tcl.terp
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filetypes: fffffffffdf
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filenames: src_hdl
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filenames: alt_mge_rd_addrdec_mch/alt_mge_rd_avmm_mux_xcvr_rcfg
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filenames:
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filenames: src_hdl
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filetypes: ffffffffffffff
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filenames:
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filenames: intel_vvp_snoop_scheduler.sv
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filenames: gxb_rx.tcl.terp/gxb_rx_reset.tcl.terp/gxb_tx.tcl.terp/gxb_tx_fpll.tcl.terp/gxb_tx_reset.tcl.terp
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filenames: jtag_basic.tcl/main.tcl/report.tcl
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filenames:
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filenames: ast/csr/efc/kr/mac/pcs/top
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filenames: pkt_client.tcl
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filetypes: fffffffffffffffffffff
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filenames:
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filenames: altera_eth_packet_underflow_control.v
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filenames: mainband/pcie_adapter_top.sv/pcie_synchronizer_pulse.sv/pcie_synchronizer_vec.sv/sideband
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filenames: ftile_debug_toolkit.sv/ftile_link_inspector_top.sv/ltssm_monitor.sv
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filetypes: ffffff
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filenames:
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filenames: design_example_rules/design_example_tb/pkgIndex.tcl/presets/source/tcl/terp/verif
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filenames: example_testbench/hardware_test_design/manual.spd.txt/software
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filenames: aldec/cadence/intelfpga/mentor/s5mlab.v/synopsys
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filenames: intel_vvp_crs_h_cmd_gen.sv
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dirname:
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filenames: alt_vip_common_shift_mux.sv
filetypes: f
dirname:
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filenames: 10g_mac_reg_map.tcl/mac_inc.tcl
filetypes: ff
dirname:
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filenames: altera_rs_ser_syn.sv
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dirname:
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filenames: ip_fm
filetypes: d
dirname:
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filenames: altera_avalon_mm_bridge.v.terp/altera_avalon_mm_bridge_hw.tcl
filetypes: ff
dirname:
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filenames: alt_vip_dil_sobel_scheduler.sv
filetypes: f
dirname:
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filenames: aldec/alt_vip_guard_bands_alg_core_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
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filenames: altera_xcvr_low_latency_phy.sv
filetypes: f
dirname:
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filenames: intel_vvp_axi_slave_stub.sv
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: intel_vab_common_slave_interface.sv/intel_vab_ext_interlace_toggle.sv
filetypes: ff
dirname:
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filenames: intel_vvp_scaler_coeff_handler.sv
filetypes: f
dirname:
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filenames: alt_vip_clipper_alg_core.sv
filetypes: f
dirname:
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filenames: Avalon_to_External_Bus_Bridge.pdf
filetypes: f
dirname:
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filenames: msim_wave.do/tb_run.tcl
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dirname:
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filenames: vcs
filetypes: d
dirname:
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filenames: alt_vip_tpg_scheduler.sv
filetypes: f
dirname:
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filenames: intel_vvp_axi_st_pipe_bridge.sv
filetypes: f
dirname:
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/hslx/cadence

filenames:
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filetypes:
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filetypes: ffffffffff
dirname:
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filenames:
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filetypes: dffffffffdddd
dirname:
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filenames:
  aldec/altera_jesd204_8b10b_dec.v/altera_jesd204_8b10b_dec_top.v/altera_jesd204_rx_mlpcs.ocp/altera_jesd204_rx_mlpcs.v/altera_jesd204_rx_pcs.v/altera_jesd204_wa.v/altera_jesd204_wys_lut.v/altera_jesd204_xn_8b10b_dec.v/cadence/intelfpga/mentor/synopsys


filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/cadence/common

filenames:
  intel_pcie_avmm_master.sv/intel_pcie_config_extractor.sv/intel_pcie_forwarding_ram.sv/intel_pcie_lut_ram.sv/intel_pcie_np_arbiter.sv/intel_pcie_qid2f_map.v/intel_pcie_ram.sv/intel_pcie_ram_2wr_1rd.sv/intel_pcie_ready_skid.sv/intel_pcie_scfifo.sv/intel_pcie_scfifo_32.sv/intel_pcie_schd_order.sv/intel_pcie_schd_piped_empty_calc.sv/intel_pcie_schd_scfifo.sv/intel_pcie_set_clr_rd.sv/intel_pcie_st_arbiter.sv/intel_pcie_st_arbiter_top.sv/intel_pcie_tx_arbiter.sv/intel_qdma_wrr_arb.sv/mqdma_dm_pkg.sv/mqdma_pkg.sv/skid_buf.sv


filenames: altera_eth_frame_decoder_2_5g.sv
filetypes: f
dirname:
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filenames: intel_vvp_csc_scheduler.sv
filetypes: f
dirname:
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filetypes: ffffff
dirname:
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filenames:
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filenames: phy_ip_inc.tcl/phy_ip_reg_map.tcl
filetypes: ff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffffdfdf
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filenames:
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filetypes: dffffdffffddd
dirname:
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filenames:
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filenames: alt_hiconnect_demux.sv.terp/alt_hiconnect_demux_hw.tcl
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dirname:
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filenames: make_qii_design.tcl/make_qsys.tcl/make_sim_design.tcl/readme.txt
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dirname:
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filenames: src
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filenames: intel_vvp_fifo_core.sv
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filenames: altera_reset_controller.sdc/altera_reset_controller.v
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dirname:
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filetypes: ffffffffffffff
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filetypes: ffffffffffffffffffffffffff
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filenames:
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filenames: aldec/cadence/intelfpga/mentor/rtl/synopsys
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames:
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filenames: altera_up_avalon_adc.v/altera_up_avalon_adc_mega.v/altera_up_avalon_adv_adc.v/de10
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dirname:
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filetypes: ffffff
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filenames:
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filetypes: dddd
dirname:
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filenames:
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filenames: ast/csr/efc/eth/kr/mac/pcs/stats
filetypes: dddddddd
dirname:
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filenames: alt_vip_common_message_pipeline_stage.sv
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dirname:
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filenames: aldec/cadence/intel_vvp_packet_writer_hw.tcl/intelfpga/mentor/src_hdl/synopsys
filetypes: ddfdddd
dirname:
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filenames: alt_vip_common_scaler_edge_detect.sv
filetypes: f
dirname:
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filenames: alt_aeu_100_pfc_top.v
filetypes: f
dirname:
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filetypes: ffffff
dirname:
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filenames:
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filenames: s10_rp_avmm_master_hwtcl.v
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dirname:
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filenames: src_hdl
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dirname:
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filenames: char25g1588/common/common_1588/hwtest/reconfig_sequencer/templates
filetypes: dddddd
dirname:
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filenames: pkgIndex.tcl/tcl/terp
filetypes: fdd
dirname:
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filenames: cii_workaround/soft_logics/whr_adapters
filetypes: ddd
dirname:
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_nco_ii/synopsys/lib

filenames:
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filetypes:
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filenames: intel_pcie_ReadyDelay.sv
filetypes: f
dirname:
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filenames: altera_up_avalon_audio_pll_hw.tcl
filetypes: f
dirname:
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filenames: chaining_dma
filetypes: d
dirname:
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filenames: alt_vip_video_input_bridge_cmd.sv
filetypes: f
dirname:
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filenames: alt_vip_tpg_multi_scheduler.sv
filetypes: f
dirname:
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filetypes: dffdfdddd
dirname:
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filenames:
  aldec/alt_vip_horiz_scaler_alg_core.v.terp/alt_vip_horiz_scaler_alg_core_hw.tcl/cadence/horiz_scl_algo_core_helper.jar/intelfpga/mentor/src_hdl/synopsys


filenames: altera_xcvr_atx_pll_s20.sdc.terp/altera_xcvr_atx_pll_s20.sv.terp/reconfig_settings.txt.terp
filetypes: fff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: intel_vvp_warp.c/intel_vvp_warp_private.h
filetypes: ff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: tpg_ctrl.tcl.terp
filetypes: f
dirname:
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filetypes: ffffffffffffffffffd
dirname:
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filenames:
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filetypes: ffffffffffffffffff
dirname:
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filenames:
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filenames: altera_eth_xgmii_ptp_inserter.v
filetypes: f
dirname:
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filenames: intel_pcie_pipestage.sv
filetypes: f
dirname:
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filetypes: fffffffffffffffffffffffffffff
dirname:
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filenames:
  pciess_cpl_metering.sv/pciess_dm_2r2w_mem.sv/pciess_dm_c2h_arbiter.sv/pciess_dm_c2h_bs.v/pciess_dm_c2h_flr_chk.sv/pciess_dm_c2h_rtlpf.sv/pciess_dm_c2h_top.sv/pciess_dm_c2h_wtlpf.v/pciess_dm_c2h_wtlpf_data_split.sv/pciess_dm_c2h_wtlpf_hdr.sv/pciess_dm_completion_tracker.sv/pciess_dm_data_pipeline.v/pciess_dm_devatt.sv/pciess_dm_flr_if.sv/pciess_dm_h2c_cpl_hdr_buffer.sv/pciess_dm_h2c_cpl_pending_array.sv/pciess_dm_h2c_cpl_reordering.sv/pciess_dm_h2c_cpl_split_tracking.sv/pciess_dm_h2c_find_free_addr.sv/pciess_dm_h2c_flr_chk.sv/pciess_dm_h2c_free_addr_tracking.sv/pciess_dm_h2c_mem_1r1w_ram.v/pciess_dm_h2c_packer.sv/pciess_dm_h2c_req_tracking.sv/pciess_dm_h2c_tlp_hdr_reformatting.sv/pciess_dm_h2c_top.v/pciess_dm_lite_csr_router.sv/pciess_dm_sort_arb.sv/pciess_dm_vf_err_msg.sv


filenames: altera_epcq_controller2_regs.h
filetypes: f
dirname:
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filenames: altera_eth_crc_allocation.v
filetypes: f
dirname:
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filetypes: ddffdfffffffffdffdf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/arria10/common_src

filenames:
  aldec/cadence/csr_kra10lt.sv/csr_kra10top.sv/intelfpga/lta10_frame_lock.sv/lta10_lcl_coef.sv/lta10_rx_data.sv/lta10_top.sv/lta10_tx_data.sv/lta10_tx_train.sv/lta10_ultra_rmt_txeq.sv/lta10_ultra_top.ocp/lta10_ultra_top.sv/mentor/rcfg_arb.sv/seqa10_sm.sv/synopsys/ultra_chnl.sv


filenames: hps_bridge_avalon_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hps/altera_hps_arria_10/hps_bridge_avalon


filenames: alt_e40_jtag_avmm.v/alt_e40_rcfg_arb.sv/alt_e40_reset_controller.v
filetypes: fff
dirname:
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filenames: common
filetypes: d
dirname:
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filetypes: ffffffffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 281 characters]


filetypes: fffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/cpriphy/cpriphy_ftile/rtl/cpriphy_ftile_lib/hslx

filenames:
  cpriphy_ftile_and3t0.v/cpriphy_ftile_and3t1.v/cpriphy_ftile_and4t0.v/cpriphy_ftile_and4t1.v/cpriphy_ftile_cnt6.v/cpriphy_ftile_eq_5_ena.v/cpriphy_ftile_eqc15h7cfbt2.v/cpriphy_ftile_eqc19h4e1fbt2.v/cpriphy_ftile_eqc4h9t1.v/cpriphy_ftile_eqc5h07t1.v/cpriphy_ftile_eqc5h0ft1.v/cpriphy_ftile_eqc5h18t1.v/cpriphy_ftile_eqc5h1bt1.v/cpriphy_ftile_eqc5h1ft1.v/cpriphy_ftile_fmon8.v/cpriphy_ftile_gray_cntr_3.v/cpriphy_ftile_gray_cntr_5_sl.v/cpriphy_ftile_gray_to_bin_5.v/cpriphy_ftile_lut6.v.terp/cpriphy_ftile_metronome32000.v/cpriphy_ftile_metronome320000.v/cpriphy_ftile_mlab.v/cpriphy_ftile_mux2w1t0s0.v/cpriphy_ftile_mux2w1t0s1.v/cpriphy_ftile_mux2w1t0s2.v/cpriphy_ftile_mux2w1t1s2.v/cpriphy_ftile_mux4w1t0s0.v/cpriphy_ftile_mux4w1t0s1.v/cpriphy_ftile_mux4w1t1s1.v/cpriphy_ftile_mux8w1t2s1.v/cpriphy_ftile_neq_5_ena.v/cpriphy_ftile_ripple16.v/cpriphy_ftile_status_sync.v/cpriphy_ftile_sync1r1.v/cpriphy_ftile_sync_regs_aclr_m2.v


filenames: altera_eth_pause_beat_conversion.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_pause_beat_conversion/intelfpga


filenames: altera_remote_update.sv/altera_remote_update_core.sv
filetypes: ff
dirname:
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filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_1588_tod/synopsys

filenames:
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filenames: intel_pcie_pipestage.sv
filetypes: f
dirname:
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filenames: intel_pcie_adapter_rx_if.sv/intel_pcie_adapter_stos.sv/intel_pcie_adapter_tx_if.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl/whr_adapters/adapter_single_segment


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/audio_ip/audio_embed/cadence


filenames: avalon-st_timing_adapter.sv.terp/avalon-st_timing_adapter_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/avalon_st/altera_avalon_st_timing_adapter


filenames: src_hdl
filetypes: d
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: altera_eth_tse_pcs_pma_gxb.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_pcs_pma_gxb/synopsys


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/50g/synopsys/rtl/csr

filenames:
[cell repeats an earlier one in this file: 193 characters]


filenames: src_hdl
filetypes: d
dirname:
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filetypes: fddffdffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sdi_ii/sdi_ii_example_design/arria_10/rtl

filenames:
[cell repeats an earlier one in this file: 103 characters]


filenames: generate_MIF.tcl/templates
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filenames: altera_eth_gmii2avst_converter.v
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filenames: alt_vip_cl_cvo.qprs/alt_vip_cl_cvo_hw.tcl/alt_vip_cl_cvo_sw.tcl
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filenames: kr4.tcl
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filenames: s5mlab.v
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filenames: altera_avalon_packets_to_master.v/altera_avalon_packets_to_master_hw.tcl
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filenames: altera_avalon_dma_128_hwtcl.v
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filenames: alt_e2550_avl_filter.v/alt_e25_reset.v
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filetypes: fffffff
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filenames:
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filenames: altpcie_a10_tbed_hwtcl.v/verilog
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filetypes: ffffffffffff
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filenames:
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filenames: d32_c39_0p.v
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filenames: source.qip/source.v
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filenames:
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filenames: nf_xcvr_10g_pll_a10.qsys
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filenames: assignments.tcl.terp
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filenames: basic.tcl
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filenames: alt_vip_stream_cleaner_alg_core.sv
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filenames: auk_dspip_ctc_umts_ast_sink.vhd
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filenames: siv_xcvr_custom_phy.sv/siv_xcvr_generic_top.sv
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filetypes: fffff
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filenames: altera_mailbox_mutiplexer_hw.tcl
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filenames: pcie_ed_master_0.v/pcie_example_design_master_0.v
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filenames: alt_vip_dil_low_angle_algorithm.sv/alt_vip_dil_pixel_offset_rom.v
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filenames: alt_vip_common_stream_input.v
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filetypes: ffffffffff
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filenames:
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filenames: src_hdl
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filenames: av_xcvr_emsip_adapter.sv/av_xcvr_pipe_native.sv/av_xcvr_pipe_native_hip.sv/av_xcvr_pipe_nr.sv
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filenames: src_hdl
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filetypes: fffffff
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filenames:
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filetypes: fffffffffffffffffff
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filenames:
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filetypes: ffffff
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filenames:
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filenames:
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filenames: alt_e100_mac_addr_regs.v/alt_e100_mac_csr.v/alt_e100_status_cntr_pause_sync.v
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filenames: nf_xcvr_10g_pll_a10.qsys
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filenames: altera_xcvr_pipe.sv
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filenames: tb_run.sh/xcelium_wave.tcl
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filenames: bitec_hdmi_rx_audio.v/bitec_hdmi_rx_audio_clk_gen.v
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filenames:
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filetypes: fffffffffffffffffffffffffff
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filenames: README_axi4/ex1_back_to_back_sv/ex1_back_to_back_vhd
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filenames: alt_e100_pma_sv_bridge.v
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filetypes: ffffff
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filetypes: fffff
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filenames:
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filenames: adapter/altera_std_synchronizer_nocut.sv/intel_pcie_bypass_ctrl_ptile.sv/intel_pcie_sep_ptile.sv
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filetypes: ffff
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filenames: Makefile.mk/Makefile_windows.mk/hmc_cfg.sv.terp/hmcc_tb.sv.terp/ncsim_wave_gen.tcl/vsim.do
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filenames: altera_eth_tse_pcs_pma_nf_phyip.v
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filetypes: fffff
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filenames: intel_vvp_axi4_stream_master_bfm_hw.tcl/src_hdl
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filenames:
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filenames: nios_system
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filetypes: ffffffffff
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filetypes: fdddddfffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: alt_vip_cl_packet_closer.sv
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filenames: intel_vvp_warp_mem.sv/intel_vvp_warp_mem_read.sv/intel_vvp_warp_mem_write.sv
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filenames: altera_cai_reset_synchronizer.v/cai_avalon.v/cai_registers.v/clocked_audio_input.v
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filenames: csrgen_output
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filetypes: fffffffff
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filenames:
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filetypes: ffffffffffffffffffff
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filenames:
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filenames: avmmReady/baseLimitCmp/nstageCmp/pipestage
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filenames: alt_xcvr_prbs_check.v/alt_xcvr_prbs_check_hw.tcl/alt_xcvr_prbs_check_top.v/alt_xcvr_prbs_poly.v
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filetypes: fffff
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filenames:
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filetypes: fffffff
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filenames:
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filenames: auk_dspip_ctc_lte_blk_info.vhd
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filenames: altera_xcvr_native_avgz_wizard.lst/pkgIndex.tcl/presets/tcl
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filetypes: ddddff
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filenames:
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filetypes: dffffffffffffffffffffffffdddfffd
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  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_sv_hip_ast

filenames:
  aldec/altera_pcie_sv_hip_ast_enable_pcisigtest.sdc/altera_pcie_sv_hip_ast_enable_power_on_rst_pulse.sdc/altera_pcie_sv_hip_ast_hip_reconfig.sdc/altera_pcie_sv_hip_ast_hw.tcl/altera_pcie_sv_hip_ast_pipen1b.sdc/altera_pcie_sv_hip_ast_rs_serdes.sdc/altera_pcie_sv_hip_ast_wizard.lst/altpcie_hip_256_pipen1b.v/altpcie_hip_eq_bypass_ph3.v/altpcie_hip_eq_dprio.v/altpcie_inspector.sv/altpcie_monitor_sv_dlhip_sim.sv/altpcie_rs_hip.v/altpcie_rs_serdes.v/altpcie_scfifo.v/altpcie_scfifo_sv.v/altpcie_sv_gbfifo.v/altpcie_sv_hip_ast_hwtcl.v/altpcie_sv_scfifo_ext.v/altpcie_tlp_inspector.v/altpcie_tlp_inspector_cseb.sv/altpcie_tlp_inspector_monitor.sv/altpcie_tlp_inspector_trigger.v/altpcietb_bfm_pipe_8to32.v/cadence/intelfpga/mentor/pcie_sv_parameters.tcl/pcie_sv_parameters_common.tcl/pcie_sv_port.tcl/synopsys


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_crs_scheduler/synopsys


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec/rtl/testbench/common

filenames:
[cell repeats an earlier one in this file: 160 characters]


filenames: aldec/alt_vip_video_input_bridge_resp_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_video_input_bridge_resp


filenames: alt_vip_gamma_corrector_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_gamma_corrector_scheduler/mentor/src_hdl


filenames: alt_vip_control_slave.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_control_slave/intelfpga/src_hdl


filenames: intel_vvp_pkt_mux.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_pkt_mux/mentor/src_hdl


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_jesd204/src/rx_mlpcs/s10_16g/synopsys

filenames:
[cell repeats an earlier one in this file: 182 characters]


filetypes: ffffffdfff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/altera_eth_tse/example_project/common/hw/ethernet_traffic_controller/eth_std_tc

filenames:
[cell repeats an earlier one in this file: 192 characters]


filetypes: ddffffffffffffddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/hdmi_2.x/tx

filenames:
  aldec/audio/bitec_hdmi_tx.ocp/bitec_hdmi_tx.sdc/bitec_hdmi_tx.v/bitec_hdmi_tx_aux_encoder.v/bitec_hdmi_tx_aux_encoder_pipeline.v/bitec_hdmi_tx_aux_encoder_wop_gen.v/bitec_hdmi_tx_aux_mux.v/bitec_hdmi_tx_aux_mux_x2.v/bitec_hdmi_tx_create_aux.v/bitec_hdmi_tx_encode.v/bitec_hdmi_tx_resample.v/bitec_hdmi_tx_tmds.v/cadence/frl/intelfpga/mentor/synopsys


filenames: altera_agilex_config_reset_release_endpoint.v/eth_dr_ed
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/dr_f/cadence/example_project/common


filenames: alt_vip_cvo_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_cvo_scheduler/cadence/src_hdl


filetypes: dddddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl/synopsys/whr_adapters

filenames:
[cell repeats an earlier one in this file: 122 characters]


filenames: alt_vip_guard_bands_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_guard_bands_scheduler/intelfpga/src_hdl


filenames: mcgb.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_pll/mcgb_package_s10/tcl


filetypes: fffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_dp/de_gen/agilex/rtl/rx_phy/dp_gxb_rx

filenames:
  agi_dp_rx_reconfig.sv/alt_xcvr_arbiter.sv/alt_xcvr_avmm_arb.sv/alt_xcvr_resync_etile.sv/altera_std_synchronizer_nocut_etile.v/directphy_f_hip.sv/directphy_f_mlab.v/directphy_f_rx_deskew.sv/directphy_f_word_delay.v/dp_gxb_rx.qip/dp_gxb_rx.v/dp_rx_directphy_f_300.sdc/dp_rx_directphy_f_300.sv/dp_rx_directphy_f_300_ip_parameters.tcl/dp_rx_directphy_f_sip_300.sv/dphy_f_avmm1.sv/dphy_f_avmm2.sv/dphy_f_ccg.v/dphy_f_csr_wrap.v/dphy_f_sip_csr.v/dphy_f_tx_dsk_gen.sv/eq_5_ena.v/ft_avmm_32to8_bridge.sv/gray_cntr_3.v/neq_5_ena.v/sync_regs_aclr_m2.v/wys_lut.v


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_pip_conv_core/mentor


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_interlaken_hp/ilk_50g_mac/intelfpga

filenames:
[cell repeats an earlier one in this file: 417 characters]


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_jesd204/src/tx/s10_16g/cadence

filenames:
[cell repeats an earlier one in this file: 285 characters]


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_gmii_mii_encoder/cadence

filenames:
[cell repeats an earlier one in this file: 216 characters]


filetypes: fffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_dp/src/intelfpga/displayport2p0/tx/txll/vs

filenames:
  dp2p0_txll_calc_crc_top.sv/dp2p0_txll_crc_cntrl_registers.sv/dp2p0_txll_crc_sync_gen.sv/dp2p0_txll_crc_top.sv/dp2p0_txll_cvi_ifm.sv/dp2p0_txll_cvi_ifm_sync.sv/dp2p0_txll_pixel_crc.sv/dp2p0_txll_vbid_flags.sv/dp2p0_txll_vc_msa_h_param_correction.sv/dp2p0_txll_vc_msa_registers.sv/dp2p0_txll_vc_msa_ro_registers.sv/dp2p0_txll_vs_adr_mux.sv/dp2p0_txll_vs_cmpr.sv/dp2p0_txll_vs_data_align.sv/dp2p0_txll_vs_data_arrange_raw_y_top.sv/dp2p0_txll_vs_data_bus.sv/dp2p0_txll_vs_data_convertor.sv/dp2p0_txll_vs_misc_encoder.v/dp2p0_txll_vs_pixel_packer.sv/dp2p0_txll_vs_registers.sv/dp2p0_txll_vs_stream_fifo.sv/dp2p0_txll_vs_sync_gen.sv/dp2p0_txll_vs_sync_gen_stream_control.sv/dp2p0_txll_vs_sync_gen_top.sv/dp2p0_txll_vs_top.sv


filenames: rx/top/tx
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/100g/rtl/efc


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/25g/intelfpga


filetypes: ffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc3/rtl/top

filenames:
[cell repeats an earlier one in this file: 294 characters]


filenames: intel_vvp_reset_ready_hold.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/legacy/intel_vvp_reset_ready_hold/intelfpga/src_hdl


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc3/example_project/templates

filenames:
  alt_ehipc3_10g25g_ptp_advancedmode_logiclockreg_gen.tcl/compilation_design_qsf_template.tcl.terp/compilation_design_qsf_template_sl.tcl.terp/compilation_design_template.sdc.terp/compilation_design_template.v.terp/compilation_design_template_dr.sdc.terp/compilation_design_template_sl.sdc.terp/compilation_design_template_sl_clocks.sdc.terp/compilation_design_template_sl_ptp.sdc.terp/compilation_design_template_sl_ptp_sn.sdc.terp/compilation_srf_template.txt.terp/cpri_hardware_design_qsf_template.tcl.terp/cpri_hardware_design_template.sdc.terp/cpri_hardware_design_template.v.terp/cpri_testbench_template.sv.terp/hardware_design_qsf_template.tcl.terp/hardware_design_qsf_template_dr.tcl.terp/hardware_design_qsf_template_ptp.tcl.terp/hardware_design_qsf_template_sl.tcl.terp/hardware_design_template.sdc.terp/hardware_design_template.v.terp/hardware_design_template_dr.sdc.terp/hardware_design_template_dr.v.terp/hardware_design_template_ptp.sdc.terp/hardware_design_template_ptp.v.terp/hardware_design_template_ptp_ppm.sdc.terp/hardware_design_template_ptp_ppm.v.terp/hardware_design_template_sl.sdc.terp/hardware_design_template_sl.v.terp/hardware_design_template_sl_ptp.sdc.terp/hardware_design_template_sl_ptp_ppm.sdc.terp/hardware_design_template_sl_ptp_ppm.v.terp/hardware_design_template_sl_ptp_sn.sdc.terp/msim_script_dr.do.terp/ncsim_script.sh.terp/ncsim_script_dr.sh.terp/pcs66_100G_hardware_design_template.v.terp/pcs66_100G_testbench_template.sv.terp/pcs_hardware_design_qsf_template_sl.tcl.terp/pcs_hardware_design_template_sl.sdc.terp/pcs_hardware_design_template_sl.v.terp/pcs_testbench_template_sl.sv.terp/pcsonly_100G_hardware_design_template.v.terp/pcsonly_100G_testbench_template.sv.terp/testbench_template.sv.terp/testbench_template_avmm_sl.sv.terp/testbench_template_dr.sv.terp/testbench_template_sl.sv.terp/testbench_template_sl_ptp.sv.terp/testbench_template_sl_ptp_ppm.sv.terp/vcs_script.sh.terp/vcs_script_dr.sh.terp/vcsmx_script.sh.terp/vcsmx_script_dr.sh.terp/xcelium_script.sh.terp/xcelium_script_dr.sh.terp


filenames: csr/efc/mac/pcs/top
filetypes: ddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e25s10/25g/cadence/rtl


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10GBASER/hwtesting/system_console

filenames:
[cell repeats an earlier one in this file: 174 characters]


filenames: avalonstloopback/gen/mon/traffic_controller.tcl
filetypes: dddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/hwtesting/system_console/traffic_controller


filenames: altera_ldpc_wifi_enc.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_ldpc/src/ldpc_ucores/enc/altera_ldpc_wifi_enc/mentor


filenames: j204c_rx_regmap.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/jesd204c_f/src/rx/mentor/rdf/csrgen_output


filetypes: fffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/example_project/templates

filenames:
[cell repeats an earlier one in this file: 526 characters]


filetypes: dffffffffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_highspeed_rs/src/reference_designs/25_100g_ethernet/enc

filenames:
  aldec/altera_frac100_rs_enc.ocp/altera_frac100_rs_enc.sv/altera_frac100_rs_enc_hw.tcl/altera_frac100_rs_enc_interpolation.sv/altera_frac100_rs_enc_lagr_pkg.sv/altera_frac100_rs_enc_pkg.sv/altera_frac100_rs_enc_syndrome.sv/altera_frac100_rs_enc_utilities.tcl/cadence/intelfpga/mentor/synopsys


filenames: wirelist.net
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/nios2_ip/altera_nios_dev_board_stratix_1s10_es/netlist


filenames: altera_avalon_fifo_util.c
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_fifo/HAL/src


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/synopsys/wrdm

filenames:
  intel_pcie_ext_60bit_adder.sv/intel_pcie_ext_62bit_adder.sv/intel_pcie_ext_avmm_translator_512.sv/intel_pcie_ext_pipelined_57_6_adder.sv/intel_pcie_ext_wdm_avmm_sm_512.sv/intel_pcie_ext_wdm_data_aligner.sv/intel_pcie_ext_wdm_destn_address_generator.sv/intel_pcie_ext_wdm_input_stage_512.sv/intel_pcie_ext_wdm_packet_generator_512.sv/intel_pcie_ext_wdm_scfifo.sv/intel_pcie_ext_write_data_mover_512.sv


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/100g/intelfpga/rtl/efc/rx

filenames:
[cell repeats an earlier one in this file: 122 characters]


filetypes: dffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/hdmi_2.0/tx/cadence

filenames:
[cell repeats an earlier one in this file: 269 characters]


filenames: auk_vit_par_ber_atl.vhd/auk_vit_par_bmp_atl.vhd/auk_vit_par_top_atl.vhd/auk_vit_par_trb_atl.vhd
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_vit_ii/src/rtl/Parallel/synopsys


filenames: altpcie_av_hip_avmm_hwtcl.v/avalon_lite/avalon_mm_128/avalon_stif
filetypes: fddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_av_hip_avmm/intelfpga


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_line_buffer/src_hdl

filenames:
[cell repeats an earlier one in this file: 124 characters]


filenames: sv_xcvr_10gbaser.sv/sv_xcvr_10gbaser_native.sv/sv_xcvr_10gbaser_nr.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_10gbaser_phy/sv/intelfpga


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/eth_f/example_project/common

filenames:
  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filetypes:
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filenames: alt_ehipc2_mac_enable_avmm.sv/alt_ehipc2_sl_pause.sv/alt_ehipc2_sm_recover.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/intelfpga/rtl/pausew


filetypes: fffffffff
dirname:
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filenames:
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filenames: altera_msi_to_gic_gen.sv/altera_msi_to_gic_gen_fifo.v
filetypes: ff
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filetypes: ffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/intelfpga/common

filenames:
  intel_pcie_avmm_master.sv/intel_pcie_config_extractor.sv/intel_pcie_forwarding_ram.sv/intel_pcie_lut_ram.sv/intel_pcie_np_arbiter.sv/intel_pcie_qid2f_map.v/intel_pcie_ram.sv/intel_pcie_ram_2wr_1rd.sv/intel_pcie_ready_skid.sv/intel_pcie_scfifo.sv/intel_pcie_scfifo_32.sv/intel_pcie_schd_order.sv/intel_pcie_schd_piped_empty_calc.sv/intel_pcie_schd_scfifo.sv/intel_pcie_set_clr_rd.sv/intel_pcie_st_arbiter.sv/intel_pcie_st_arbiter_top.sv/intel_pcie_tx_arbiter.sv/intel_qdma_wrr_arb.sv/mqdma_dm_pkg.sv/mqdma_pkg.sv/skid_buf.sv


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_csc_algo_comp/aldec


filenames: cm_rule_cpri_auto.tcl/cm_rule_cpri_auto_tb.tcl
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dirname:
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filenames: intel_vvp_pkt_clip.sv
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dirname:
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filenames: rtl
filetypes: d
dirname:
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filenames: inc/src
filetypes: dd
dirname:
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filenames: altera_eth_tse_bridge.v
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dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ddddddddddddddd
dirname:
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filenames:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 1560 characters]


filenames: src_hdl
filetypes: d
dirname:
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filenames: altera_pcie_bfm_components.v
filetypes: f
dirname:
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filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pr_freeze_bridge/avlmm/avlmm_slv_freeze_bridge

filenames:
[cell repeats an earlier one in this file: 149 characters]


filetypes: dfffdddd
dirname:
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filenames:
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filetypes: dfffdddd
dirname:
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filenames:
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filenames: agx_hdmi21.sdc
filetypes: f
dirname:
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filenames: aldec/alt_e100_mac.ocp/alt_e100_mac.v/cadence/common/csr/intelfpga/mentor/rx/synopsys/tx
filetypes: dffdddddddd
dirname:
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filetypes: ffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 313 characters]


filenames: inc/src
filetypes: dd
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffffffffffff
dirname:
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filenames:
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filenames: altpcie_s10_tbed_bfm_hwtcl.v/altpcie_s10_tbed_hwtcl.v/verilog
filetypes: ffd
dirname:
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filenames: ncsim_wave.tcl/tb_run.sh
filetypes: ff
dirname:
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filetypes: fffffffdffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 193 characters]


filenames: altera_eth_packet_formatter.v
filetypes: f
dirname:
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filetypes: fffffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 302 characters]


filenames: rtl
filetypes: d
dirname:
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filenames: inc/intel_vvp_guard_bands_sw.tcl/src
filetypes: dfd
dirname:
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filenames: top_hw.v
filetypes: f
dirname:
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filetypes: ddddddddddddd
dirname:
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filenames:
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filenames: alt_e50s10_fc_top.v/alt_e50s10_rx_fc.v/alt_e50s10_tx_fc.v/alt_e50s10_tx_fc_frame_muxer.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e50s10/50g/aldec/rtl/efc


filenames: intel_st_debug_fabric_hw.tcl
filetypes: f
dirname:
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filetypes: dffffffffffffffffffdddd
dirname:
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filenames:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: altera_xcvr_pll_sv_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl
filetypes: fffff
dirname:
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filetypes: fffffffffffffffffffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 923 characters]


filenames: intel_vvp_ext_to_int_scheduler.sv
filetypes: f
dirname:
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filenames: reset_release_s10.ip
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_1588v2/rtl/reset_release


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filetypes: fffffff
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filenames: altera_eth_fifo_pause_ctrl_adapter.v/altera_eth_fifo_pause_ctrl_adapter_hw.tcl
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filetypes: fffffffffffffffffff
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filenames: src_hdl
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filetypes: ffffffffffffffffffffff
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filetypes: fffffffffffffffffffffffffffff
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filetypes: fffff
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filetypes: ffff
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filenames:
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filetypes: ffff
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filetypes: fffffffffffffffffffffff
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  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_dp/src/intelfpga/displayport2p0/rx

filenames:
  dp1p4_rx_decoder.v/dp1p4_rx_phy_word_aligner.sv/dp2p0_rx_crc_checker.sv/dp2p0_rx_decoder.sv/dp2p0_rx_ll.sv/dp2p0_rx_ll_control.sv/dp2p0_rx_ll_decoder.sv/dp2p0_rx_ll_decoder_audio.sv/dp2p0_rx_ll_decoder_msa.sv/dp2p0_rx_ll_decoder_sdp.sv/dp2p0_rx_ll_decoder_sym_packer.sv/dp2p0_rx_ll_decoder_vbid.sv/dp2p0_rx_ll_demux.sv/dp2p0_rx_ll_demux_llcp.sv/dp2p0_rx_ll_demux_mtp.sv/dp2p0_rx_ll_pixel_crc.sv/dp2p0_rx_ll_pr.sv/dp2p0_rx_ll_vid.sv/dp2p0_rx_lphy.sv/dp2p0_rx_lphy_ber_cnt.sv/dp2p0_rx_lphy_cdi4.sv/dp2p0_rx_lphy_descrambler.sv/dp2p0_rx_lphy_lane_converter.sv/dp2p0_rx_lphy_lane_converter_setup.sv/dp2p0_rx_lphy_lane_converter_sym_packer.sv/dp2p0_rx_lphy_lt_ctrl.sv/dp2p0_rx_lphy_prbs_checker.sv/dp2p0_rx_lphy_precoding.sv/dp2p0_rx_lphy_symbol_deshifting.sv/dp2p0_rx_lphy_symbol_deshifting_maj_4b.sv/dp2p0_rx_lphy_sync_patt_detect.sv/dp2p0_rx_lphy_video_decode.sv/dp2p0_rx_lphy_video_decode_cdi1_1spc_1lane.sv/dp2p0_rx_lphy_video_decode_cdi1_1spc_2lane.sv/dp2p0_rx_lphy_video_decode_cdi1_24_1_mux.sv/dp2p0_rx_lphy_video_decode_cdi1_2spc_1lane.sv/dp2p0_rx_lphy_video_decode_cdi1_2spc_2lane.sv/dp2p0_rx_lphy_video_decode_cdi1_48_1_mux.sv/dp2p0_rx_lphy_video_decode_control.sv/dp2p0_rx_lphy_video_decode_downshift.sv/dp2p0_rx_lphy_video_decode_downshift_lane0.sv/dp2p0_rx_lphy_video_decode_fec_error.sv/dp2p0_rx_lphy_video_decode_fec_error_bit_counter.sv/dp2p0_rx_lphy_video_decode_fec_error_block_counter.sv/dp2p0_rx_lphy_video_decode_fec_error_block_increment.sv/dp2p0_rx_lphy_video_decode_fec_error_lane.sv/dp2p0_rx_lphy_video_decode_fec_in_mux.sv/dp2p0_rx_lphy_video_decode_fec_rst_gen.sv/dp2p0_rx_lphy_video_decode_fec_rst_iso.sv/dp2p0_rx_lphy_video_decode_out_symbol_shifter.sv/dp2p0_rx_lphy_video_decode_phy_sync_check.sv/dp2p0_rx_lphy_video_decode_sym_ram_in_mux.sv/dp2p0_rx_lphy_video_decode_sync_loss.sv/dp2p0_rx_lphy_video_decode_upshift.sv/dp2p0_rx_lphy_video_decode_upshift_lane0.sv/dp2p0_rx_lphy_video_decode_word_deinterleave_1spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_deinterleave_2spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_interleave.sv/dp2p0_rx_lphy_video_decode_word_interleave_1spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_interleave_2spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_shifter.sv/dp2p0_rx_reg_ctrl.sv/dp2p0_rx_reg_ctrl_fec_mux.sv/dp2p0_rx_reset_ctrl.sv/dp2p0_rx_rst_ctrl.sv/dp2p0_rx_sync_loss_hysteresis.sv/dp2p0_rx_video_stream.sv/dp_rx_aux_ctrl.sv/dp_rx_decoder_top.sv/fec_decoder


filenames: harq_combine.v/harq_ddr_adapter.sv/harq_fifo.sv/harq_top.ocp/harq_top.v
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpcv_5g/src/rtl/harq


filenames: altera_eth_pfc_pause_conversion.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_pfc_pause_conversion/synopsys


filenames: alt_vip_common_seq_par_convert.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/aldec/modules/alt_vip_common_seq_par_convert/src_hdl


filenames: inc/src
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_spislave_to_avalonmm_bridge/HAL


filenames: altera_merlin_slave_translator.sv.terp/altera_merlin_slave_translator_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/merlin/altera_merlin_slave_translator


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_cps_alg_core/intelfpga/src_hdl

filenames:
[cell repeats an earlier one in this file: 118 characters]


filenames: intel_vvp_fifo_core.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_fifo_core/cadence/src_hdl


filetypes: fffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl/whr_adapters/adapter_common

filenames:
[cell repeats an earlier one in this file: 561 characters]


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_dp/src/cadence/displayport2p0/rx

filenames:
  dp1p4_rx_decoder.v/dp1p4_rx_phy_word_aligner.sv/dp2p0_rx_crc_checker.sv/dp2p0_rx_decoder.sv/dp2p0_rx_ll.sv/dp2p0_rx_ll_control.sv/dp2p0_rx_ll_decoder.sv/dp2p0_rx_ll_decoder_audio.sv/dp2p0_rx_ll_decoder_msa.sv/dp2p0_rx_ll_decoder_sdp.sv/dp2p0_rx_ll_decoder_sym_packer.sv/dp2p0_rx_ll_decoder_vbid.sv/dp2p0_rx_ll_demux.sv/dp2p0_rx_ll_demux_llcp.sv/dp2p0_rx_ll_demux_mtp.sv/dp2p0_rx_ll_pixel_crc.sv/dp2p0_rx_ll_pr.sv/dp2p0_rx_ll_vid.sv/dp2p0_rx_lphy.sv/dp2p0_rx_lphy_ber_cnt.sv/dp2p0_rx_lphy_cdi4.sv/dp2p0_rx_lphy_descrambler.sv/dp2p0_rx_lphy_lane_converter.sv/dp2p0_rx_lphy_lane_converter_setup.sv/dp2p0_rx_lphy_lane_converter_sym_packer.sv/dp2p0_rx_lphy_lt_ctrl.sv/dp2p0_rx_lphy_prbs_checker.sv/dp2p0_rx_lphy_precoding.sv/dp2p0_rx_lphy_symbol_deshifting.sv/dp2p0_rx_lphy_symbol_deshifting_maj_4b.sv/dp2p0_rx_lphy_sync_patt_detect.sv/dp2p0_rx_lphy_video_decode.sv/dp2p0_rx_lphy_video_decode_cdi1_1spc_1lane.sv/dp2p0_rx_lphy_video_decode_cdi1_1spc_2lane.sv/dp2p0_rx_lphy_video_decode_cdi1_24_1_mux.sv/dp2p0_rx_lphy_video_decode_cdi1_2spc_1lane.sv/dp2p0_rx_lphy_video_decode_cdi1_2spc_2lane.sv/dp2p0_rx_lphy_video_decode_cdi1_48_1_mux.sv/dp2p0_rx_lphy_video_decode_control.sv/dp2p0_rx_lphy_video_decode_downshift.sv/dp2p0_rx_lphy_video_decode_downshift_lane0.sv/dp2p0_rx_lphy_video_decode_fec_error.sv/dp2p0_rx_lphy_video_decode_fec_error_bit_counter.sv/dp2p0_rx_lphy_video_decode_fec_error_block_counter.sv/dp2p0_rx_lphy_video_decode_fec_error_block_increment.sv/dp2p0_rx_lphy_video_decode_fec_error_lane.sv/dp2p0_rx_lphy_video_decode_fec_in_mux.sv/dp2p0_rx_lphy_video_decode_fec_rst_gen.sv/dp2p0_rx_lphy_video_decode_fec_rst_iso.sv/dp2p0_rx_lphy_video_decode_out_symbol_shifter.sv/dp2p0_rx_lphy_video_decode_phy_sync_check.sv/dp2p0_rx_lphy_video_decode_sym_ram_in_mux.sv/dp2p0_rx_lphy_video_decode_sync_loss.sv/dp2p0_rx_lphy_video_decode_upshift.sv/dp2p0_rx_lphy_video_decode_upshift_lane0.sv/dp2p0_rx_lphy_video_decode_word_deinterleave_1spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_deinterleave_2spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_interleave.sv/dp2p0_rx_lphy_video_decode_word_interleave_1spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_interleave_2spc_1lane.sv/dp2p0_rx_lphy_video_decode_word_shifter.sv/dp2p0_rx_reg_ctrl.sv/dp2p0_rx_reg_ctrl_fec_mux.sv/dp2p0_rx_reset_ctrl.sv/dp2p0_rx_rst_ctrl.sv/dp2p0_rx_sync_loss_hysteresis.sv/dp2p0_rx_video_stream.sv/dp_rx_aux_ctrl.sv/dp_rx_decoder_top.sv/fec_decoder


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/hdl_modules/clock_crossing/cadence

filenames:
[cell repeats an earlier one in this file: 208 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_cadence_detect/aldec


filenames: intel_pcie_baselimit_compare.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/soft_switch/sep/rtl/intelfpga/common/baseLimitCmp


filetypes: ffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/src/intelfpga/h2ddm

filenames:
[cell repeats an earlier one in this file: 409 characters]


filenames: dec/enc
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_ldpc/src/ldpc_ucores


filenames: intel_pcie_pipestage.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/soft_switch/sep/rtl/synopsys/common/pipestage


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/pgm/altera_s10_configuration_clock

filenames:
[cell repeats an earlier one in this file: 185 characters]


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/synopsys/altera_pcie_s10_writedatamover

filenames:
[cell repeats an earlier one in this file: 520 characters]


filenames: altera_emif_local_reset_combiner.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/emif/ip_local_reset_combiner/rtl


filenames: README.txt/generate_sim_verilog.tcl/generate_sim_vhdl.tcl/testbench
filetypes: fffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_testbench


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/schedulers/intel_vvp_mixer_slave/aldec


filenames: avalonstloopback/gen/mon/traffic_controller.tcl
filetypes: dddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/altera_eth_tse_design_example/tse_ieee1588_s10etile/hardware_test_design/sc/traffic_controller


filenames: intel_hdmi_edid_hdlg.v/intel_hdmi_hpd_hdlg.v/intel_hdmi_ltp_chk.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/misc/intelfpga


filenames: dec/enc
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_polar_5g/src/mentor/rtl


filenames: intel_vab_pipelined_mux.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/hdl_modules/pixel_shift/cadence


filenames: altgxb_reconfig.v/gpll.v/s4gx_gen1x8_qsys_top.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_avmm/mentor/example_designs/s4gx_gen1x8


filetypes: dddddddddddddddddddddddddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/mentor/modules

filenames:
[cell repeats an earlier one in this file: 1045 characters]


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/nios2_ip/altera_nios2/boot_loader_sources

filenames:
[cell repeats an earlier one in this file: 239 characters]


filenames: pkgIndex.tcl/source/tcl
filetypes: fdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_pll/altera_xcvr_cdr_pll_s10


filenames: intel_vvp_pipelined_mux.sv/intel_vvp_rotate_mux.sv/intel_vvp_shift_mux.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/hdl_modules/pixel_shift/synopsys


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_uflex_interlaken/uflex_ilk_mac/intelfpga

filenames:
[cell repeats an earlier one in this file: 2284 characters]


filenames: altera/common/main.tcl/readme.txt
filetypes: ddff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/example_project/hwtest


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/example_project/common

filenames:
[cell repeats an earlier one in this file: 1281 characters]


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ilk/ftile/uflex_ilk_mac/aldec

filenames:
[cell repeats an earlier one in this file: 2284 characters]


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/40g/intelfpga


filenames: alt_vip_bps_converter.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_bps_converter/src_hdl


filenames: altera_agilex_config_reset_release_endpoint.v/eth_dr_ed
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/dr_f/mentor/example_project/common


filenames: intel_vvp_guard_bands_algo_comp.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_guard_bands_algo_comp/aldec/src_hdl


filenames: alt_e40_block_distributor.v/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/40g/aldec/rtl/pcs


filetypes: dfffffffffffddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_jesd204/src/tx/s10_16g

filenames:
  aldec/altera_jesd204_tx_base.ocp/altera_jesd204_tx_base.v/altera_jesd204_tx_base_dyncsr.v/altera_jesd204_tx_csr.v/altera_jesd204_tx_csr_dyncsr.v/altera_jesd204_tx_ctl.v/altera_jesd204_tx_dll.v/altera_jesd204_tx_regmap.v/altera_jesd204_tx_regmap_opt.v/altera_jesd204_tx_regmap_opt_dyncsr.v/altera_jesd204_tx_scrambler.v/cadence/intelfpga/mentor/spyglass/synopsys


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/alt_vip_dil_vof_scheduler/cadence


filenames: pkgIndex.tcl/presets/tcl/terp
filetypes: fddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_native_phy/xcvrnphy_fmh


filenames: hslx
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/aldec/rtl/alt_ehipc2_lib


filetypes: ffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/avmm_bridge_512/aldec/schd/tx

filenames:
[cell repeats an earlier one in this file: 465 characters]


filenames: altera_eth_lane_decoder_2_5g.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_lane_decoder_2_5g/intelfpga


filetypes: dfddfdfdffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/hwtesting/system_console

filenames:
[cell repeats an earlier one in this file: 151 characters]


filenames: intel_vab_common_pkg.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/sv_packages/aldec


filenames: tx_control_src
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/hw_demo/agx_frl_demo/software


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/adapter/intelfpga/rx

filenames:
[cell repeats an earlier one in this file: 133 characters]


filenames: mentor/synopsys/xcelium
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_RSFEC/example_testbench/s10


filenames: alt_e40_jtag_avmm.v/alt_e40_reset_controller.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40/40g/rtl/cadence/top


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_round_sat_algo_comp/cadence


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/schedulers/intel_vvp_mixer_scheduler/intelfpga


filenames: altera_eth_tse_pcs.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_pcs/cadence


filenames: altpcied_cfbp_app_example.sv/verilog
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_hip_ast_ed/intelfpga/altera_pcie_cfgbp_ed


filenames: altera_epcq_controller.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_epcq_controller/HAL/inc


filenames: avst_credit_reset_sync.sv
filetypes: f
dirname:
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filenames: ep_g1x1.qsys/ep_g1x4.qsys/ep_g1x8.qsys/ep_g2x1.qsys/ep_g2x4.qsys/ep_g2x8.qsys
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filenames: rtl
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filenames: src_hdl
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filenames: alt_e100_rx_e10x10_base.v
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filenames: altera_phylite_s10_cfg_ctrl.sv
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filenames: altera_rs_ser_bm.sv
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filenames: rnr_pcie_ehp_pack/rnr_pcie_ehp_tx_deallocate_ctr.sv/rnr_pcie_ehp_unpack/rnr_pcie_ehp_wrapper.sv
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filenames: altera_avalon_dma_256_hwtcl.v
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filenames: pfd.sdc.terp/pfd.v
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filetypes: ffffffffffffffff
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames: c3_reconfig.c/c3_reconfig.h/main.c/nios_system_oc_mem2_0_onchip_memory2_0.hex
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filenames: src_hdl
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filetypes: fffffffffffffffffffffffffff
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filetypes: fffff
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filenames: altera_10gbaser_phy_clockcomp.sv/altera_10gbaser_phy_rx_fifo.sv/altera_10gbaser_phy_soft_fifo.v
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
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filenames:
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filetypes: fffffffffffffffffffffffff
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filenames:
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filenames: intel_pcie_schd_order.sv/intel_pcie_schd_piped_empty_calc.sv/intel_pcie_schd_scfifo.sv
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filenames: src_hdl
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filenames: eth_100g_nrz/eth_25g_nrz
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filenames: alt_vip_vfb_linebuf_ctrl.sv
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filenames: altera_xcvr_pll_sv_wizard.lst/pkgIndex.tcl/tcl
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filenames: alt_vip_cpp_converter.sv
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filenames: alt_vip_common_mult_add.sv
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filetypes: ffffffffffffffffff
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filenames:
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filetypes: ffffffffff
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filenames:
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filenames: intel_axi2cv_scheduler.ocp/intel_axi2cv_scheduler.sv
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filenames: alt_xcvr_etile_custom_tester_hw.tcl/alt_xcvr_etile_custom_tester_top.v
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dirname:
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filetypes: fffffffffffffffffffff
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filenames:
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filetypes: dddfffffffffffffffffffffffffffffffdd
dirname:
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filenames:
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
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filenames: ex1_back_to_back_vhd.xml/filters.xml/preferences.xml
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filenames: sv_xcvr_emsip_adapter.sv/sv_xcvr_pipe_native.sv/sv_xcvr_pipe_nr.sv
filetypes: fff
dirname:
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filetypes: ffdffff
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filenames:
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filenames: altera_pcie_s10_txs.sv
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filetypes: ffffffffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffff
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filenames:
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filenames: altera_ldpc_wimedia_enc.sv
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filenames: src_hdl
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filenames: MGLS_VER/bin/etc/lib
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
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filetypes: ddffdd
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filenames:
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filenames: alt_vip_scaler_scheduler.sv
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filetypes: ffffffffffffffffffffffff
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filenames:
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filetypes: fffffffffffff
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filenames: rtl
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filenames:
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filenames: altera_eth_lane_encoder_2_5g.sv/altera_eth_lane_encoder_2_5g_dfa.sv
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filenames: src_hdl
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filetypes: fffff
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filetypes: dfffffdddd
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filenames:
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filenames: alt_dual_boot.v/alt_dual_boot_avmm.v
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filetypes: fffffffffffff
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filenames: pcs_reg_map.tcl/tse_pcs_inc.tcl
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filenames: alt_vip_video_input_bridge_cmd.sv
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filenames: src_hdl
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filenames: alt_e100_pma_sv_bridge.v
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filenames: aux_mux.tcl.terp/aux_retransmit.v/aux_src_gen.v/ext_aux_filter.v/rxtx_link.v/scfifo_vid.tcl.terp
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filetypes: ffffffffffffffffff
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filetypes: fffffffffffffffffffffffffff
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filenames: default_test_params_pkg.sv.terp/ed_sim
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filenames: tb_run.sh/tb_top.ucli.txt/vcs_wave.tcl
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filenames:
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filenames: common/rx/tx
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filetypes: fffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: rtl
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filenames: alt_vip_tpg_const_alg_core.sv
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filenames: intel_generic_serial_flash_interface_addr.sv/intel_generic_serial_flash_interface_addr_hw.tcl
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filenames: alt_aeuex_sys_pll_sv_100_0002.qip/alt_aeuex_sys_pll_sv_100_0002.v
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filenames: alt_vip_video_over_film.sv
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filenames: src_hdl
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filenames: example_project/example_testbench/rtl
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filenames: cm_rule_basic_standard_pcs.tcl/cm_rule_basic_standard_pcs_tb.tcl
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filenames: HAL/altera_up_avalon_video_dma_controller_hw.tcl/altera_up_avalon_video_dma_controller_sw.tcl/hdl
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filenames: alt_vip_vfb_sync_ctrl.sv
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filenames: class.ptf/mk_sram.pl
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filenames: src_hdl
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filenames: src_hdl
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filenames: altera_reset_controller.sdc/altera_reset_controller.v/altera_reset_synchronizer.v
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dirname:
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filetypes: dfdddddddddd
dirname:
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filenames:
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filenames: altpcie_av_hip_128bit_atom.v/altpcie_av_hip_ast_hwtcl.v
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dirname:
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filetypes: dffffffffdddddd
dirname:
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filenames:
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filenames: altera_eth_tse_pcs_pma_nf_lvds.v
filetypes: f
dirname:
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filetypes: ffffffffffffffffffffffd
dirname:
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filenames:
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filenames: alt_e40_jtag_avmm.v/alt_e40_rcfg_arb.sv/alt_e40_reset_controller.v
filetypes: fff
dirname:
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dirname:
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: fp_add_a10.vhd/fp_add_s10.vhd/fp_mult_a10.vhd/fp_mult_s10.vhd
filetypes: ffff
dirname:
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filenames: inc/src
filetypes: dd
dirname:
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filenames: alt_e100_pma_sv_bridge_caui4.v
filetypes: f
dirname:
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filenames: altera_eth_lane_decoder_2_5g.sv
filetypes: f
dirname:
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filenames: altera_vic_compare2.sv/altera_vic_compare4.sv/altera_vic_priority.sv/altera_vic_priority_hw.tcl
filetypes: ffff
dirname:
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filenames: eth_ex_100g_sv.qpf/eth_ex_100g_sv.qsf/eth_ex_100g_sv.v
filetypes: fff
dirname:
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filenames: ast/efc/eth/lib/mac/pcs/pfc/ptp
filetypes: dddddddd
dirname:
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filetypes: ffffff
dirname:
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filenames:
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filetypes: ffffffffffffffffffffffffff
dirname:
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filenames:
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filetypes: ffffffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_vip_common_latency_1_to_latency_0.sv/alt_vip_common_video_packet_decode.sv
filetypes: ff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: mersinvald
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dirname:
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filenames: c4gx_gen1x4/s4gx_gen1x8
filetypes: dd
dirname:
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filetypes: ffffffffffffff
dirname:
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filenames:
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filetypes: fffffff
dirname:
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filenames:
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filenames: component.mk/data_source_util.c
filetypes: ff
dirname:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: altera_eth_pfc_generator.v/altera_eth_pfc_generator_qfsm.v
filetypes: ff
dirname:
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filetypes: ffffffffff
dirname:
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filenames:
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filetypes: ff
dirname:
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filenames:
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filetypes: fffffffffff
dirname:
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filenames:
  intel_pcie_ext_rddm_avmm.sv/intel_pcie_ext_rddm_avmm_cpl.sv/intel_pcie_ext_rddm_avst.sv/intel_pcie_ext_rddm_avst_cpl.sv/intel_pcie_ext_rddm_data_aligner.sv/intel_pcie_ext_rddm_desc_preproc.sv/intel_pcie_ext_rddm_desc_queue.sv/intel_pcie_ext_rddm_header_gen.sv/intel_pcie_ext_rddm_ram.sv/intel_pcie_ext_rddm_scfifo.sv/intel_pcie_ext_rddm_top.sv


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/hslx/common

filenames:
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filenames: altera_eth_tse_mac.v
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filetypes: ffffffffffffffff
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filenames:
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filenames: intel_generic_serial_flash_interface_top.h
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filenames: altera_eth_crc.v/crc32.v/gf_mult32_kc.v
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filenames: common
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filenames: dp_core.tcl.terp/dp_rx.tcl.terp/dp_tx.tcl.terp/edid_memory.hex
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filenames: packages/sliv_ip_toolkit.tcl
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filenames: terp
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filenames:
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filenames: main.tcl.terp
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filenames: alt_interlaken_12lane_10g.qsys/alt_interlaken_12lane_10g.sdc/setup_proj.tcl/testbench
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filenames:
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filenames: IOPLL_half_clk_a10.qsys
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filenames: aldec/cadence/intel_vvp_axi_master_stub_hw.tcl/intelfpga/mentor/src_hdl/synopsys
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filenames: alt_vip_stream_cleaner_scheduler.sv
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dirname:
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filetypes: ffff
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filenames:
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filenames: csrgen_output
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filetypes: fffffdddfffffffffffff
dirname:
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filenames:
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filenames:
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filenames: alt_vip_common_frame_counter.v
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dirname:
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filenames: altera_xcvr_native_avgz_hw.tcl/module.tcl
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dirname:
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filetypes: fffffffffffffffffffffffdd
dirname:
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filenames:
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filenames: altera_up_external_bus_to_avalon_bridge_hw.tcl/doc/hdl
filetypes: fdd
dirname:
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/hslx/common/cadence

filenames:
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filetypes:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_e50s10_fc_top.v/alt_e50s10_rx_fc.v/alt_e50s10_tx_fc.v/alt_e50s10_tx_fc_frame_muxer.v
filetypes: ffff
dirname:
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filetypes: ffffffffffff
dirname:
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filenames:
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filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/mcdma/ed/ext_desc_ctrl

filenames:
  intel_pcie_ext_desc_arbiter.sv/intel_pcie_ext_desc_cmpl.sv/intel_pcie_ext_desc_ctrl_hw.sv/intel_pcie_ext_desc_ctrl_hw.tcl/intel_pcie_ext_desc_fetch.sv/intel_pcie_ext_desc_fetch_proc.sv/intel_pcie_ext_desc_fetch_split.sv/intel_pcie_ext_desc_gcsr.sv/intel_pcie_ext_desc_package.sv/intel_pcie_ext_desc_qcsr.sv/intel_pcie_ext_desc_sdp_ram.sv/intel_pcie_ext_desc_sdp_ram_fw.sv/intel_pcie_ext_desc_status.sv/intel_pcie_ext_desc_tdp_ram.sv/intel_pcie_ext_desc_tdp_ram_fw.sv


filetypes: dfffdffdddff
dirname:
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filenames:
  altera_pcie_cfgbp_ed/altera_pcie_hip_ast_ed_hw.tcl/altera_pcie_reconfig_driver_hw.tcl/altpcie_reconfig_driver.sv/altpcie_simple_downstream_apps/altpcied_sv.sdc/altpcied_sv_hwtcl.sv/example_design/intelfpga/mentor/rd_pcie_sv_parameters.tcl/rd_pcie_sv_port.tcl


filenames: alt_vip_common_generic_step_count.v
filetypes: f
dirname:
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filetypes: ffffffffffffffffffffffffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 759 characters]


filenames: soft_wrapper
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_rtile/pcie/common/rtl/mentor


filenames: altera_reset_controller.sdc/altera_reset_controller.v
filetypes: ff
dirname:
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filenames: altera_eth_tse_pcs.v
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filetypes: ffffff
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filetypes: dffffffffffffffffffffffffffffffffdffffffddd
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filenames: em_asmi.pl/em_asmi.pm
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filenames: rtl
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filenames: rtl
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filenames: src_hdl
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filenames: src_hdl
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filenames: alt_e100_mac_addr_regs.v/alt_e100_mac_csr.v/alt_e100_status_cntr_pause_sync.v
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filenames: altera_eth_crc.v/crc32.v/gf_mult32_kc.v
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filetypes: ffff
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filetypes: dfffdddd
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filenames:
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filetypes: ffffffffffffff
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filenames:
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filenames: src_hdl
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filenames: altera_eth_avalon_mm_adapter.v
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filenames: alt_ehipc2_lut6.v
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filetypes: ffffffffff
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filenames:
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filenames:
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filenames: intel_vvp_crs_scheduler.sv/intel_vvp_crs_scheduler_ext.sv/intel_vvp_crs_scheduler_int.sv
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filenames: src_hdl
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filetypes: fffffffffffffffffff
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filenames:
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filenames: alt_e40_top_sv_kr4.qpf/alt_e40_top_sv_kr4.qsf/alt_e40_top_sv_kr4.v
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filenames: intel_vvp_common_simple_dpram.sv
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filenames: aldec/cadence/intel_vvp_crs_v_up_algo_comp_hw.tcl/intelfpga/mentor/src_hdl/synopsys
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filenames: intel_vvp_axi_slave_stub.sv
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filenames: kernel/user
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filenames: altera_trace_printf_monitor.sv/altera_trace_printf_monitor.svd/altera_trace_printf_monitor_hw.tcl
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filetypes: fffffffffffff
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filenames:
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filetypes: ffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffd
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filenames:
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filenames: alt_aeu_40_efc_top.v/alt_aeu_40_sfc_top.v
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dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ddfffffffddd
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filenames:
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filenames: core/pkg/testbench
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filenames: common/hwtest_sl/templates
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filenames: soft_wrapper
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filenames: intel_vvp_reset_ready_hold.sv
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filetypes: ffffffffdfdd
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filenames:
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filenames: alt_hiconnect_router.sv.terp/alt_hiconnect_router_hw.tcl
filetypes: ff
dirname:
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filenames: gen_inc.tcl/gen_reg_map.tcl
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filenames: csr/efc/mac/pcs/top
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filenames: src_hdl
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filenames: agent
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filenames: intel_vvp_round_sat_algo_comp.sv
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filenames: altera_external_memory_bfm.sv/altera_external_memory_bfm_vhdl_wrapper.sv
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filenames: src_hdl
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filetypes: ffffffffffffffffffffffffffffffffffff
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filenames: src_hdl
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filenames: alt_a10mlab.v/alt_wys_lut.v
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filetypes: fffff
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filenames: common/hdmi_rx/hdmi_tx/hdr/i2c_slave/sdc/xcvr_reconfig_arbiter.sv
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filenames: avalonstloopback/gen/mon/traffic_controller.tcl
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filetypes: ffffff
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filenames: altera_eth_1588_pps.v
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filetypes: fffffffffff
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filenames: alt_vip_chroma_key_alg_core.sv
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filenames: src_hdl
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filenames: altera_eth_10g_rx_register_map.v
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filenames:
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filetypes: ffffffffff
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filenames: ilk_24l_6g_rx_stripe_adapter.v/ilk_24l_6g_tx_stripe_adapter.v
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filenames: core/pkg
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filenames: rtl
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filenames: alt_vip_common_scaler_edge_detect.sv
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filenames: rtl
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filenames: altera_up_avalon_reset_from_locked_signal_hw.tcl/hdl
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filenames: alt_vip_gamma_corrector_scheduler.sv
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filenames: intel_vvp_axi_to_msg.sv
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filenames: altera_erasure_dec_tb.sv.terp/altera_erasure_dec_test_program.sv.terp
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filenames: altera_usb_debug_link_hw.tcl/altera_usb_debug_link_internal_hw.tcl
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filenames:
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filetypes: ffff
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filenames:
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filenames: mem_ss_reset_controller.sv
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filenames: license_bsd.txt
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filetypes: fffffffffff
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filetypes: fffffffff
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filetypes: fffffffffffffffffffff
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filetypes: fff
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filetypes: fffffffffffffffffffffffff
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filenames: common/hwtest_sl/templates
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filenames: altera_rs_ser_enc.sv
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filenames: src_hdl
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filetypes: ffffffff
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filenames:
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filetypes: fffdd
dirname:
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filenames:
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filetypes: ffffffffffff
dirname:
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filenames:
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filetypes: ddffffdddd
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filenames:
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filenames: rx/top/tx
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dirname:
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filenames: alt_vip_common_pip_bunch.sv
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dirname:
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filenames: src_hdl
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filenames: altera_eth_lane_encoder_2_5g.sv/altera_eth_lane_encoder_2_5g_dfa.sv
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dirname:
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filetypes: ffffffffffffffffffffffffffffffffff
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filenames:
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filenames: altera_avalon_performance_counter.h
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dirname:
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filenames: src_hdl
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dirname:
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filenames:
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filenames: det_lat/efifo/ls_pcs
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dirname:
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filenames: tod_inc.tcl/tod_reg_map.tcl
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filenames: ilk_24l_6g_rx_stripe_adapter.v/ilk_24l_6g_tx_stripe_adapter.v
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dirname:
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filetypes: fffffffffffffff
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filenames:
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filenames: bitec_hdmi_rx_audio.v
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dirname:
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filetypes: ffffffffff
dirname:
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filenames:
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filetypes: ffffff
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filenames:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: alt_vip_warp_addr_gen.sv/alt_vip_warp_multiply.sv
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dirname:
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filenames: src_hdl
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dirname:
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filenames: intel_vvp_pkt_mux.sv
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dirname:
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filenames: altera_sl3_phy_adapter.sv/altera_sl3_phy_adapter_c3.sv
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dirname:
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filenames: rtl
filetypes: d
dirname:
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filenames: alt_vip_common_event_packet_encode.sv
filetypes: f
dirname:
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filenames: alt_xcvr_reconfig_analog.tcl/alt_xcvr_reconfig_if.tcl/alt_xcvr_reconfig_mif.tcl/debug_tools
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dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffd
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filenames:
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filetypes: ffffffffff
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filenames:
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filetypes: ffffffffffffffffff
dirname:
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filenames:
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filetypes: ffff
dirname:
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filenames:
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filetypes: fffffffffffffffffffffffffff
dirname:
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: altera_eth_tse_nf_phyip_terminator.v
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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