# filelist

filenames: altera_reset_controller.sdc/altera_reset_controller.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE_1588v2/rtl/reset_ctrl


filenames: vcs
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE_1588v2/simulation/ed_sim/synopsys


filenames: rx/top/tx
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_eth_ultra/100g/synopsys/rtl/efc


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/phy/csr

filenames:
[cell repeats an earlier one in this file: 100 characters]


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/alt_interlaken/alt_ntrlkn_10l_6g/cadence

filenames:
[cell repeats an earlier one in this file: 1806 characters]


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_jesd204/src/rx/a10/synopsys

filenames:
[cell repeats an earlier one in this file: 494 characters]


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE_1588v2/rtl/eth_traffic_controller/eth_1588_traffic_controller/TrafficController_1588_10g

filenames:
[cell repeats an earlier one in this file: 311 characters]


filetypes: ffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/toolkits/s10/packages

filenames:
[cell repeats an earlier one in this file: 378 characters]


filenames: ethernet_model/mdio
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/tse_ucores/altera_eth_tse_testbench/testbench/models/verilog


filenames: altera_eth_avst2gmii_converter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/ethernet_ucore/altera_eth_avst2gmii_converter/mentor


filenames: alt_xcvr_freq_checker.v/alt_xcvr_freq_checker_hw.tcl/alt_xcvr_freq_checker_top.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_freq_checker


filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/eth_f/example_project/hwtest/altera/optical_module


filetypes: ffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/phy/mentor/pcs/rx

filenames:
[cell repeats an earlier one in this file: 759 characters]


filenames: cv_xcvr_custom_native.sv/cv_xcvr_custom_nr.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_xcvr_8g_custom/cv/mentor


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_dp/src/cadence/bitec_dp/rx/ss

filenames:
[cell repeats an earlier one in this file: 145 characters]


filenames: jtag_basic.tcl/main.tcl/report.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_ehipc2/example_project/hwtest/common


filenames: chaining_dma/root_port
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_pcie/altera_pcie_a10_ed/example_design/verilog


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_onchip_flash/altera_onchip_flash/aldec

filenames:
[cell repeats an earlier one in this file: 259 characters]


filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/altera_eth_tse/example_project/common/hw_design/address_decoder/address_decoder_multi_channel/altera_merlin_slave_agent

filenames:
  address_decoder_multi_channel_altera_merlin_slave_agent_191_ncfkfri.sv/altera_merlin_burst_uncompressor.sv


filetypes: ffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/eth_f/aldec/rtl/ptp

filenames:
[cell repeats an earlier one in this file: 567 characters]


filetypes: fffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_eth_ultra/100g_bm/aldec

filenames:
[cell repeats an earlier one in this file: 998 characters]


filenames: altera_phylite_s20_cfg_ctrl.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_phylite/ip_s20_cfg_ctrl/mentor/rtl


filenames: alt_xcvr_csr_common_h.sv/alt_xcvr_csr_pcs8g_h.sv/altera_xcvr_functions.sv/sv_xcvr_h.sv
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/seriallite_iii/src/common/sim/header


filenames: ilk_oob_flow_rx.v/ilk_oob_flow_rx_dcfifo.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/alt_interlaken_hp/ilk_oob/ilk_oob_rx


filenames: common/hwtest/templates
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/altera_eth_tse/example_project


filetypes: dffddddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE/rtl

filenames:
[cell repeats an earlier one in this file: 248 characters]


filetypes: dffffffffdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_jesd204/src/rx_mlpcs/s10_16g

filenames:
  aldec/altera_jesd204_8b10b_dec.v/altera_jesd204_8b10b_dec_top.v/altera_jesd204_rx_mlpcs.ocp/altera_jesd204_rx_mlpcs.v/altera_jesd204_rx_pcs.v/altera_jesd204_wa.v/altera_jesd204_wys_lut.v/altera_jesd204_xn_8b10b_dec.v/cadence/mentor/spyglass/synopsys


filenames: final_placement_pciex8x8.txt
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/intel_pcie/ftile/avst/tcl/ed_json


filenames: jtag_basic.tcl/main.tcl/report.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e50s10/example_project/hwtest/common


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/common_hdl/cadence/modules/alt_vip_common_pip_merge


filenames: det_lat/efifo/ls_pcs
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/cpriphy/cpriphy_ftile/aldec/rtl


filetypes: ffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e100s10/100g/synopsys/rtl/pcs/rx

filenames:
[cell repeats an earlier one in this file: 691 characters]


filenames: altera_pcie_bfm_components.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_pcie/altera_pcie_avmm/cadence/testbench/verilog/common


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/ethernet_ucore/altera_eth_gmii_mii_encoder/mentor

filenames:
[cell repeats an earlier one in this file: 121 characters]


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_hdmi/src/axi_intf/rx/mentor

filenames:
[cell repeats an earlier one in this file: 284 characters]


filenames: altpciexpav_lite_app.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_pcie/altera_pcie_av_hip_avmm/mentor/avalon_lite


filenames: eth_ultra_mac_inc.tcl/eth_ultra_phy_inc.tcl/eth_ultra_stats_inc.tcl/main.tcl
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e40/example_project/hwtest/altera/alt_aeu_40


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec/mentor/rtl/core

filenames:
[cell repeats an earlier one in this file: 368 characters]


filenames: alt_xcvr_resync.sv/altera_xcvr_reset_sequencer_s10.sv/altera_xcvr_reset_sequencer_s10_hw.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/sld/si_fixes/alt_xcvr/altera_xcvr_reset_sequencer/altera_xcvr_reset_sequencer_s10


filenames: alt_vip_dil_weave_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_dil_weave_scheduler/synopsys/src_hdl


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e2550/50g/rtl/csr

filenames:
[cell repeats an earlier one in this file: 193 characters]


filenames: A10Devkit.jpg/altpcie_devkit.sdc/altpcie_devkit.v/altpcie_devkit_hw.tcl
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_pcie/altera_pcie_a10_ed/devkit


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e25s10/25g/cadence


filenames: alt_vip_cl_tpg_hw.tcl/alt_vip_cl_tpg_sw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/full_ip/alt_vip_cl_tpg


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/intel_pcie/mcdma/src/cadence/flr_ctrl

filenames:
[cell repeats an earlier one in this file: 286 characters]


filenames: avalon-st_multiplexer.sv.terp/avalon-st_multiplexer_hw.tcl/sync_rst_avalon-st_multiplexer.sv.terp
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/avalon_st/altera_avalon_st_multiplexer


filetypes: ffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_hdmi/src/hdmi_2.0/common/synopsys

filenames:
[cell repeats an earlier one in this file: 259 characters]


filenames: altera_eth_tse_pcs_pma_lvds.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/tse_ucores/altera_eth_tse_pcs_pma_lvds/cadence


filenames: alt_ehipc3_gf_clock_mux.v/alt_ehipc3_kr.sv/alt_ehipc3_resync_nocut.sv/alt_ehipc3_wait_generate.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_ehipc3/aldec/rtl/kr


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_message_pipeline_stage


filenames: intel_vvp_pkt_demux.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_pkt_demux/mentor/src_hdl


filenames: common/fm/s10
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_ehipc2/rtl/mac_adapter


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/intel_pcie/mcdma/src/synopsys/flr_ctrl

filenames:
[cell repeats an earlier one in this file: 286 characters]


filenames: class.ptf/em_clock_crossing_fifo.pl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/sopc_builder_ip/altera_avalon_clock_crossing


filenames: aldec/alt_vip_warp_ac_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_warp_ac


filenames: alt_vip_crs_scheduler.ocp/alt_vip_crs_scheduler.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_crs_scheduler/src_hdl


filenames: ast/efc/eth/lib/mac/pcs/pfc/pma/ptp
filetypes: ddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_eth_ultra/40g/mentor/rtl


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e25s10/25g/rtl/efc

filenames:
[cell repeats an earlier one in this file: 115 characters]


filetypes: dfffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/ethernet_ucore/altera_eth_packet_underflow_control

filenames:
[cell repeats an earlier one in this file: 150 characters]


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/rtl/tod

filenames:
[cell repeats an earlier one in this file: 114 characters]


filetypes: ffddff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE_1588v2/rtl/eth_traffic_controller

filenames:
[cell repeats an earlier one in this file: 146 characters]


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/rtl/eth_traffic_controller/crc32/crc32_lib

filenames:
[cell repeats an earlier one in this file: 193 characters]


filenames: eth_1588_traffic_controller_top.v/tc_1588_10g
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC/hardware_test_design/common/tc_1g/eth_1588_tc


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/seriallite4/ed/ed_sim/scripts

filenames:
[cell repeats an earlier one in this file: 126 characters]


filenames: alt_aeu_100_ack_skid.v/alt_e100_status_sync.v/alt_e100_sync_arst.v/e100_sync_arst.v/reverse_words.v
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_eth_ultra/100g/cadence/rtl/lib


filenames: alt_vip_common_data_by_line_rearrange.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/common_hdl/aldec/modules/alt_vip_common_data_by_line_rearrange/src_hdl


filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/altera_eth_tse/example_project/common/hw_design/address_decoder/ip/address_decoder_top/address_decoder_top_traffic_controller_ch_10_11

filenames:
  address_decoder_top_traffic_controller_ch_10_11.v/address_decoder_top_traffic_controller_ch_10_11_altera_merlin_slave_translator_191_x56fcki.sv


filenames: address_decoder/ethernet_traffic_controller
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/altera_eth_tse_design_example/tse_ieee1588_s10etile/hardware_test_design/common


filenames: Altera_UP_Clocks.pdf
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/university_program/clocks/doc


filenames: aldec/alt_vip_gamma_corrector_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_gamma_corrector_scheduler


filetypes: fffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_xcvr_det_latency/soft_pcs/mentor

filenames:
[cell repeats an earlier one in this file: 1032 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/audio_ip/audio_extract/synopsys


filenames: altera_customins_master_translator.v.terp/altera_customins_master_translator_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/merlin/altera_customins_master_translator


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_message_width_adapt/synopsys


filenames: ncsim_wave.tcl/tb_run.sh
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G/simulation/ed_sim/cadence


filenames: alt_vip_crs_422_drop_pad.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_crs_422_drop_pad/cadence/src_hdl


filenames: alt_xcvr_bitrev_byterev_polinv_hw.tcl/alt_xcvr_bitrev_byterev_polinv_top.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_bitrev_byterev_polinv


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/alt_e2550/25g/aldec/rtl/efc

filenames:
[cell repeats an earlier one in this file: 100 characters]


filenames: altera_eth_loopback.v/altera_eth_loopback_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/ethernet/altera_eth_10g_design_example/design_example_components/altera_eth_loopback


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_mix_alg_core/synopsys/src_hdl

filenames:
[cell repeats an earlier one in this file: 142 characters]


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filetypes: fffffffffffffffff
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filetypes: ffffffffffff
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filenames: altera_avalon_mm_clock_crossing_bridge.v.terp/altera_avalon_mm_clock_crossing_bridge_hw.tcl
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filetypes: dffffffffffd
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filenames: alt_vip_common_sync_generation.v
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filenames:
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filenames: altpcie_dynamic_control.sv/dma_control_hw.tcl/dma_controller.sv
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filenames: make_qii_design.tcl/make_qsys.tcl/make_sim_design.tcl/phylite_niosii_bridge/readme.txt
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filenames:
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dirname:
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filenames: src_hdl
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filenames: intel_pcie_pipestage.sv
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filetypes: ffffffdfdd
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filenames:
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filenames: alt_vip_common_sop_align.sv
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filenames: mon_inc.tcl/mon_reg_map.tcl
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filenames: src_hdl
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filenames: rnr_pcie_cii_ari_decode.sv/rnr_pcie_cii_workaround.sv/rnr_pcie_qhip_req_ovr.sv/virtio
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filenames: alt_vip_csc_scheduler.sv
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filetypes: ffffffffffffffffff
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filenames:
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filenames: aldec/alt_vip_tpg_const_alg_core_hw.tcl/cadence/mentor/src_hdl/synopsys
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filetypes: fffffff
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filenames:
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filenames: pkt_client.tcl
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filenames: aldec/altera_eth_tse_mac.sdc/altera_eth_tse_mac.v/altera_eth_tse_mac_hw.tcl/cadence/mentor/synopsys
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filenames: alt_vip_dil_low_angle_algorithm.sv/alt_vip_dil_pixel_offset_rom.v
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filenames: filelist.f/ip_sim.sh/run.tcl/vcs_sim.sh
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filenames: rtl
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filenames:
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filenames: avst_credit_w2n.sv.terp/avst_credit_w2n_hw.tcl/avst_credit_w2n_new.sv.terp
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filenames: ptp_checker.tcl/ptp_common_proc.tcl/ptp_fw.tcl/ptp_params.tcl.terp/ptp_reg_map.tcl/ptp_vl_calc.tcl
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filenames: rtl
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filenames: core
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filenames: nios_system
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filenames: alt_vip_dil_algorithm.sv
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filenames: src_hdl
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filenames: common_src/reconfig
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filenames:
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filenames: altera_eth_pad_inserter.v
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filenames: alt_ehipc3_fm_mac_enable_avmm.sv/alt_ehipc3_fm_sl_pause.sv/alt_ehipc3_fm_sm_recover.sv
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filetypes: fff
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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filenames: altera_eth_1588_pps.v
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filenames:
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filenames: alt_vip_common_pip_bunch.sv
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filenames: intel_pcie_ReadyDelay.sv
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filenames: emif_fm_toolkit.tcl/emif_nd_toolkit.tcl/packages
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filenames: rx/top/tx
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filenames: alt_vip_common_round_sat.sv
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filetypes: ffffffffff
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filenames: gxb_rx.tcl.terp/gxb_rx_reset.tcl.terp/gxb_tx.tcl.terp/gxb_tx_fpll.tcl.terp/gxb_tx_reset.tcl.terp
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filenames: aldec/cadence/intel_vvp_input_interface_bridge_hw.tcl/mentor/src_hdl/synopsys
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filenames: hslx
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filetypes: ffffff
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filenames: intel_avst_dp_dcfifo.sv/intel_avst_dp_dcfifo_hw.tcl/intel_avst_dp_dcfifo_sync.sv
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filenames: bitec_hdmi_rx_audio.v
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filenames: alt_vip_clipper_alg_core.sv
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filenames:
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filenames: inc/src
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filetypes: dffffffffffffffffffffffffffffddd
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filenames:
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filenames: alt_mge_xcvr_reset_ctrl_channel_s10.ip
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filetypes: ffffffffffffffffff
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filenames:
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filenames: src_hdl
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filenames:
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filenames: intel_jesd204c_phy_adapter_c3.v/intel_jesd204c_signal_adapter.v
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filenames: alt_vip_dil_scheduler.sv
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filenames: alt_aeu_40/kr4/optical_module/pkt_client/sval_top
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filenames: alt_vip_common_pip_merge.sv
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filenames: src_hdl
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filenames: src_hdl
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filenames: avalonstloopback/gen/mon/traffic_controller.tcl
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filenames: alt_aeu_100_pfc_top.v
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filetypes: fffffff
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filetypes: ffffffffffffff
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filetypes: ffffffffffffffffff
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filetypes: dfffddd
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filenames: altera_mm_interconnect_hw.tcl
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filenames:
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filenames: aldec/altera_eth_tse_bridge.v/altera_eth_tse_bridge_hw.tcl/cadence/mentor/synopsys
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filenames:
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filetypes: ffffffffffffffff
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filenames: alt_e40_mac_addr_regs.v/alt_e40_mac_csr.v/alt_e40_status_cntr_pause_sync.v
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filenames: main_umts_dec.m/main_umts_enc.m/umts_turbo_dec.p.mexa64/umts_turbo_enc.p.mexa64
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filenames:
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filetypes: ffff
dirname:
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filenames:
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filenames: alt_e100_phy_pma_sv_caui4.v
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dirname:
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filenames: altpcie_pcie_reconfig_bridge.v/altpcie_pll_100_250.v/altpcie_pll_125_250.v/altpcie_rs_serdes.v
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dirname:
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filenames: intel_vvp_snoop_scheduler.sv
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filenames: duplex/simplex
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dirname:
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filetypes: ffffffff
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filenames:
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filenames: rtl
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dirname:
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filenames: src_hdl
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dirname:
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filenames: alt_ehipc2_clock_mon.sv/alt_ehipc2_jtag_avmm.sv/alt_ehipc2_package.sv
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filetypes: ffffffffffffffff
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filenames:
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filenames: alt_e40_mac.ocp/alt_e40_mac.v/cadence/common/csr/mentor/rx/synopsys/tx
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filenames: src_hdl
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dirname:
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filenames: marvell
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dirname:
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filenames: alt_e40_phy_pma_sv.v
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dirname:
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filenames: cm_rule_pma_direct_multi_bonded.tcl/cm_rule_pma_direct_multi_bonded_tb.tcl
filetypes: ff
dirname:
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filenames: altpcierd_tl_cfg_sample.v
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filenames: alt_e100_mac_addr_regs.v/alt_e100_mac_csr.v/alt_e100_status_cntr_pause_sync.v
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filetypes: ffff
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filenames:
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filenames: altera_pcie_s10_txs.sv
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dirname:
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filenames: lpddr4x_pmu_train_dmem.incv/lpddr4x_pmu_train_imem.incv
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filenames: dec/enc
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dirname:
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filetypes: ffffffffffffffffffffffff
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filetypes: fffdffffff
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filenames:
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filenames: aldec/alt_e40_phy.v/cadence/csr/mentor/pcs/pma_a10/pma_siv/pma_sv/pma_sv_bridge/synopsys
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filetypes: fffff
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filetypes: ffffffffffff
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filenames:
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filenames: altera_hsrs_testbench.tcl/altera_hsrs_utilities.tcl/avalon_streaming_util.tcl
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filenames: a10_hdmi2_demo.v.terp/common/gxb/hdmi_rx/hdmi_tx/nios.tcl.terp/pll/reconfig_mgmt/rxtx_link.v/sdc
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filenames: rtl
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filetypes: fffffffffff
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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dirname:
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filetypes: ffffffffffffffff
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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dirname:
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filenames: alt_vip_common_sop_align.sv
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filetypes: fffff
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filenames:
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filenames: inc/src
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dirname:
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filenames: main.tcl/reg_map_inc.tcl
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filetypes: fffffffffffffff
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filenames:
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filenames: intel_vvp_warp.h/intel_vvp_warp_regs.h
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filenames: inc/src
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filetypes: ffffffffff
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filetypes: fffffff
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filenames:
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filenames: altera_eth_10gmem_statistics_collector.v
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filenames: main.tcl/reg_map_inc.tcl
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filenames:
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dirname:
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filenames: inc
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dirname:
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filenames: common/hwtest/templates
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dirname:
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filetypes: fffffffff
dirname:
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filenames: intel_leac_csr_interface.sv/intel_leac_csr_interface_hw.tcl
filetypes: ff
dirname:
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filenames:
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filenames: eth_ex_40g_a10.qpf/eth_ex_40g_a10.qsf/eth_ex_40g_a10.v
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dirname:
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dirname:
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filenames: alt_vip_cl_packet_dangler.sv
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dirname:
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filenames: intel_vvp_msg_to_axi.sv
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dirname:
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filenames: src_hdl
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dirname:
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dirname:
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filetypes: fffff
dirname:
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filenames:
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filenames: alt_vip_video_input_bridge_cmd.sv
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filenames: alt_vip_common_sync.v
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dirname:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: alt_vip_dil_sobel_scheduler.ocp/alt_vip_dil_sobel_scheduler.sv
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dirname:
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filetypes: fff
dirname:
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filenames:
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filenames: lib
filetypes: d
dirname:
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filenames: altera_16550_uart.sv
filetypes: f
dirname:
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filenames: src_hdl
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dirname:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: alt_e40_jtag_avmm.v/alt_e40_rcfg_arb.sv/alt_e40_reset_controller.v
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dirname:
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filenames: alt_vip_interlacer_scheduler.ocp/alt_vip_interlacer_scheduler.sv
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dirname:
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filenames: alt_vip_common_sample_counter.v
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ffffff
dirname:
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filenames:
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filenames: altera_emif_local_reset_sim_source.sv
filetypes: f
dirname:
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filenames: alt_xcvr_bit_slip.sv/alt_xcvr_bit_slip_hw.tcl/alt_xcvr_bit_slip_top.sv
filetypes: fff
dirname:
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filenames: cadence/ilk_4l_6g_rx_stripe_adapter.v/ilk_4l_6g_tx_stripe_adapter.v/mentor/synopsys
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dirname:
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filenames: alt_e40_block_distributor.v/alt_e40_pcs.ocp/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
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dirname:
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filetypes: ffffff
dirname:
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filenames:
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filenames: alt_xcvr_rst_req_mux.v/alt_xcvr_rst_req_mux_hw.tcl
filetypes: ff
dirname:
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filetypes: fffffffffffffffffffff
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filenames:
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filetypes: ddddddd
dirname:
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filenames:
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filetypes: fffffffffff
dirname:
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filenames:
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filenames: altera_10gbaser_phy_clockcomp.sv/altera_10gbaser_phy_rx_fifo.sv/altera_10gbaser_phy_soft_fifo.v
filetypes: fff
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filenames: altera_reset_translator_hw.tcl
filetypes: f
dirname:
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filenames: src_hdl
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dirname:
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filenames: src_hdl
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dirname:
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filenames: common_src
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dirname:
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filenames: altera_eth_mdio.v
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filetypes: ffffff
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  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/sld/jtag/altera_in_system_sources_probes

filenames:
[cell repeats an earlier one in this file: 160 characters]


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.4.0/QuartusPrimePro/21.2/ip/altera/altera_phylite/ip_sim_ctrl/mentor


