# filelist

filenames: intel_leac_main_controller.sv.terp/intel_leac_main_controller_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/pgm/intel_legacy_asmi_controller/intel_leac_main_controller


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/cpriphy/alt_cpriphy_c3/mentor/rtl/det_lat

filenames:
[cell repeats an earlier one in this file: 206 characters]


filenames: gxb_rx.tcl.terp/gxb_rx_reset.tcl.terp/gxb_tx.tcl.terp/gxb_tx_fpll.tcl.terp/gxb_tx_reset.tcl.terp
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_hdmi/hw_demo/stratix_10/rtl/gxb


filenames: class.ptf/em_clock_crossing_fifo.pl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/sopc_builder_ip/altera_avalon_clock_crossing


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_sriov2/cadence


filenames: dc_fifo_0.ip
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10GBASER/rtl/fifo_dcfifo/ip_c10/dc_fifo


filenames: aldec/alt_vip_crs_v_up_core_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/processing/alt_vip_crs_v_up_core


filenames: inc/src
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/university_program/audio_video/video/altera_up_avalon_video_pixel_buffer_dma/HAL


filenames: hslx
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_ehipc2/rtl/alt_ehipc2_lib


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_e25s10/25g/cadence/rtl/mac

filenames:
[cell repeats an earlier one in this file: 226 characters]


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/intel_rtile/pcie/common/rtl/soft_wrapper/rnr_pcie_ehp/rnr_pcie_ehp_pack/rtl

filenames:
  rnr_pcie_ehp_pack_lut.sv/rnr_pcie_ehp_pack_lut_16sw.sv/rnr_pcie_ehp_pack_lut_x4.sv/rnr_pcie_ehp_pack_lut_x4sw.sv/rnr_pcie_ehp_pack_lut_x8.sv/rnr_pcie_ehp_pack_lut_x8sw.sv


filenames: alt_vip_common_round_sat.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/common_hdl/cadence/modules/alt_vip_common_round_sat/src_hdl


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/intel_pcie/mcdma/src/synopsys/rx_tlp

filenames:
[cell repeats an earlier one in this file: 411 characters]


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_e100s10/100g/rtl/pcs/tx

filenames:
[cell repeats an earlier one in this file: 206 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/utility/alt_vip_pip_sop_realign/cadence


filetypes: ffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_1588v2/rtl/ethernet_traffic_controller/eth_1588_traffic_controller/TrafficController_1588_10g

filenames:
[cell repeats an earlier one in this file: 337 characters]


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dsp/intel_fpga_ldpcv_5g/src/mentor/rtl/ldpcRm

filenames:
[cell repeats an earlier one in this file: 272 characters]


filetypes: fffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_sriov2/mentor/rtl

filenames:
[cell repeats an earlier one in this file: 689 characters]


filenames: rx/top/tx
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_eth_ultra/100g/cadence/rtl/efc


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/alt_xcvr/altera_xcvr_pll/altera_xcvr_atx_pll_vi/mentor/source

filenames:
[cell repeats an earlier one in this file: 104 characters]


filetypes: fffffffffffffdfffddfffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC/hardware_test_design

filenames:
[cell repeats an earlier one in this file: 578 characters]


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/eth_anlt_f/synopsys


filenames: alt_vip_common_seq_par_convert.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_seq_par_convert/src_hdl


filenames: aldec/alt_vip_vfb_sync_ctrl_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/utility/alt_vip_vfb_sync_ctrl


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec/rtl/testbench/common

filenames:
[cell repeats an earlier one in this file: 160 characters]


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII_1588v2/rtl/tod_sync

filenames:
[cell repeats an earlier one in this file: 221 characters]


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_s10_tbed/mentor/verilog

filenames:
[cell repeats an earlier one in this file: 127 characters]


filenames: eth_ex_100g_sv.qpf/eth_ex_100g_sv.qsf/eth_ex_100g_sv.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_eth_ultra/example_project/100g_sv


filenames: alt_e50_fc_top.v/alt_e50_rx_fc.v/alt_e50_tx_fc.v/alt_e50_tx_fc_frame_muxer.v
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_e2550/50g/aldec/rtl/efc


filetypes: fffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_sriov2/synopsys/rtl

filenames:
[cell repeats an earlier one in this file: 689 characters]


filetypes: ffffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_dp/software/btc_dprx_syslib

filenames:
[cell repeats an earlier one in this file: 141 characters]


filenames: basic.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE_1588v2/hwtesting/system_console/basic


filenames: reset_csr.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/rtl/reset_csr


filenames: altera_eth_crc.v/crc32.v/gf_mult32_kc.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/ethernet_ucore/altera_eth_crc/cadence


filenames: system_console
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G/hwtesting


filetypes: dfffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/tse_ucores/altera_eth_tse_pcs_pma_gxb

filenames:
[cell repeats an earlier one in this file: 123 characters]


filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE_1588v2/hwtesting/system_console/traffic_controller/avalonstloopback


filetypes: fffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_hip_ast_ed/altera_pcie_cfgbp_ed

filenames:
[cell repeats an earlier one in this file: 108 characters]


filenames: alt_vip_bps_converter.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/utility/alt_vip_bps_converter/mentor/src_hdl


filenames: alt_mge_rd_addrdec_mch/alt_mge_rd_avmm_mux_xcvr_rcfg
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/rtl/address_decoder/ip_s10


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/common_hdl/synopsys/modules/alt_vip_common_fifo


filenames: altera_rs_ser_transaction_format_adapter.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/rs_ii/src/rs_ucores/dec/altera_rs_ser_transaction_format_adapter/synopsys


filenames: alt_vip_pip_sop_realign.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/utility/alt_vip_pip_sop_realign/mentor/src_hdl


filenames: altera_trace_printf_monitor.sv/altera_trace_printf_monitor.svd/altera_trace_printf_monitor_hw.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/sld/trace/monitors/altera_trace_printf_monitor


filenames: system_console
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/hwtesting


filetypes: ddddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/alt_xcvr/altera_xcvr_native_phy

filenames:
  altera_xcvr_native_s10/altera_xcvr_native_s10_common_design_example_rules/altera_xcvr_native_s10_etile/altera_xcvr_native_s10_htile/altera_xcvr_native_s20_common_design_example_rules/altera_xcvr_native_s20_htile/altera_xcvr_native_vi/av/avgz/cv/directphy_f/dx_altera_xcvr_native_a10/sv/xcvrnphy_fme/xcvrnphy_fmh


filenames: alt_aeu_40_efc_top.v/alt_aeu_40_sfc_top.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_eth_ultra/40g/cadence/rtl/efc/top


filenames: altera_mailbox_mutiplexer_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/pgm/altera_nd_mailbox_multiplexer/altera_nd_mailbox_mutiplexer_top


filenames: alt_ehipc2_clock_mon.sv/alt_ehipc2_jtag_avmm.sv/alt_ehipc2_package.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_ehipc2/synopsys/rtl/top


filenames: altera_avalon_lan91c111.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/sopc_builder_ip/altera_avalon_lan91c111/HAL/inc


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/alt_interlaken/alt_ntrlkn_20l_6g

filenames:
[cell repeats an earlier one in this file: 3775 characters]

filetypes:
[cell repeats an earlier one in this file: 106 characters]


filetypes: ffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_s10_hip_ast/altera_pcie_s10_sriov_bridge

filenames:
[cell repeats an earlier one in this file: 927 characters]


filetypes: fdfffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/intel_rtile/common/rtl/cadence

filenames:
  altera_std_synchronizer_nocut.sv/csb_adaptor/lutlen0.v/lutlen0_16sw.v/lutlen0_x4.v/lutlen0_x8.v/lutlen0_x8sw.v/lutlen1.v/lutlen1_16sw.v/lutlen1_x4.v/lutlen1_x8.v/lutlen1_x8sw.v/lutlen2.v/lutlen2_16sw.v/lutlen2_x8.v/lutlen3.v/lutlen3_16sw.v/lutlen3_x8.v/lutlen4.v/lutlen5.v/lutlen6.v/lutlen7.v/rnr_simple_fifo.sv


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/emif/ip_mem_model/ip_core_ddr3

filenames:
[cell repeats an earlier one in this file: 189 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/processing/alt_vip_warp_ac/cadence


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII_1588v2/simulation/ed_sim/models

filenames:
[cell repeats an earlier one in this file: 189 characters]


filenames: SSRAM_Controller.pdf
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/university_program/memory/altera_up_avalon_ssram/doc


filenames: alt_aeu_100_efc_top.v/alt_aeu_100_sfc_top.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/ethernet/alt_eth_ultra/100g/rtl/efc/top


filenames: 25_100g_ethernet
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dsp/altera_highspeed_rs/src/reference_designs


filenames: alt_e100_top_sv.qpf/alt_e100_top_sv.qsf/alt_e100_top_sv.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/alt_eth_40g_100g/100gbe/example/alt_e100_top_sv


filenames: memphy_utils.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/intel_hps/dm/ddr/arch_common/timing


filenames: altera_avlst_pr_freeze_bridge_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pr_freeze_bridge/avlst/top


filenames: auk_dspip_ctc_umts_ast_sink.vhd
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dsp/altera_turbo/UMTS/cadence/src/rtl/ast


filenames: dec/enc
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dsp/altera_ldpc/src/ldpc_ucores


filetypes: dffffffffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/sopc_builder_ip/altera_avalon_fifo

filenames:
[cell repeats an earlier one in this file: 244 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/processing/alt_vip_warp_ac/mentor


filenames: altera_xcvr_pll_sv_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/alt_xcvr/altera_xcvr_pll/sv/tcl


filenames: design_example_rules/pkgIndex.tcl/presets/tcl/terp
filetypes: dfddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/alt_xcvr/altera_xcvr_native_phy/altera_xcvr_native_s20_htile


filetypes: fffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_pcie/altera_pcie_s10_tbed/verilog

filenames:
  altera_pcie_s10_tbed_reset_delay_sync.v/altpcierd_tl_cfg_sample.v/altpcietb_bfm_cfbp.v/altpcietb_bfm_cfbp_mcdma.v/altpcietb_bfm_configure.v/altpcietb_bfm_constants.v/altpcietb_bfm_driver_rp.v/altpcietb_bfm_ep_example_chaining_pipen1b.v/altpcietb_bfm_log.v/altpcietb_bfm_rdwr.v/altpcietb_bfm_req_intf.v/altpcietb_bfm_rp_gen3_x8.sv/altpcietb_bfm_rp_gen3_x8_cfgbp.sv/altpcietb_bfm_shmem.v/altpcietb_bfm_tlp_inspector.v/altpcietb_bfm_top_ep.v/altpcietb_bfm_top_rp.v/altpcietb_bfm_vc_intf_128.v/altpcietb_bfm_vc_intf_64.v/altpcietb_g3bfm_configure.v/altpcietb_g3bfm_constants.v/altpcietb_g3bfm_log.v/altpcietb_g3bfm_rdwr.v/altpcietb_g3bfm_req_intf.v/altpcietb_g3bfm_shmem.v/altpcietb_g3bfm_vc_intf_ast_common.v/altpcietb_ltssm_mon.v/altpcietb_pipe32_driver.v/altpcietb_pipe32_hip_interface.v/altpcietb_pipe_phy.v/pcie_mti_setup.tcl/pcie_ncsim_setup.sh/pcie_stratixv_atoms.v/pcie_stratixv_hssi_atoms.v/pcie_stratixv_pcie_hip_atoms.v/pcie_vcs_setup.sh/stratixiv_hssi_atoms.v/stratixiv_pcie_hip_atoms.v/stratixv_hssi_atoms.v/stratixv_pcie_hip_atoms.v/sv_xcvr.sv


filenames: j204c_rx_regmap.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/intel_jesd204c/src/rx/aldec/rdf/csrgen_output


filenames: alt_vip_crs_422_drop_pad.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/vip/ip_library/component_ip/processing/alt_vip_crs_422_drop_pad/synopsys/src_hdl


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/dsp/altera_highspeed_rs/src/reference_designs/25_100g_ethernet/enc/aldec

filenames:
[cell repeats an earlier one in this file: 160 characters]


filenames: altera_phylite_cfg_ctrl.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/21.1/ip/altera/altera_phylite/ip_cfg_ctrl/rtl


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filenames: aldec/alt_a10mlab.v/alt_wys_lut.v/cadence/mentor/synopsys
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filenames: src_hdl
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filenames: src_hdl
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filenames: src_hdl
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filenames: altera_trace_dummy_monitor.v/altera_trace_dummy_monitor_hw.tcl
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filenames: alt_ehipc3_gf_clock_mux.v/alt_ehipc3_kr.sv/alt_ehipc3_resync_nocut.sv/alt_ehipc3_wait_generate.v
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filenames: src_hdl
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filetypes: fffffffffffff
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filenames: ncsim_in_cmd.txt/run_ncsim.sh
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filenames: aldec/alt_vip_vfb_rd_ctrl_hw.tcl/cadence/mentor/src_hdl/synopsys
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filenames: alt_e100_tx_top_sv.qpf/alt_e100_tx_top_sv.qsf/alt_e100_tx_top_sv.v
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filenames: altera_eth_statistics_collector.v
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filenames: mcgb.tcl
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filenames: altera_eth_link_fault_detection.v
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filenames: rtl
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filenames: ast/csr/efc/eth/kr/mac/pcs/stats
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filenames:
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filenames: auk_dspip_ctc_umts_input.vhd/auk_dspip_ctc_umts_input_ram.vhd/auk_dspip_ctc_umts_itlvr_ram.vhd
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filenames: intel_pcie_baselimit_compare.sv
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filetypes: ffffffffffff
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filenames:
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filetypes: ffff
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filenames:
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filetypes: ffffffff
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filenames:
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filenames: altera_eth_valid_timestamp_detector.v
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filenames: avst_credit_w2n.sv.terp/avst_credit_w2n_hw.tcl/avst_credit_w2n_new.sv.terp
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filenames: aldec/alt_vip_line_stats_hw.tcl/cadence/mentor/src_hdl/synopsys
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filenames: altera_xcvr_fpll_a10.sv
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filenames: bitswap_qsys.v/bitswap_qsys_hw.tcl
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filetypes: ffffffffffffffffffffffff
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filetypes: fffff
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filenames: a10_40bit_4pack.v/e40_io_frame_40.v/e40_reco.v/s5_40bit_4pack.v/s5_40bit_trip_raw.v/s5xcvr.v
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filenames:
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filenames:
  bcm2bits_db/db_nd7m_h_gx_leftfbga12138a_parasitic.db/db_nd7m_h_gx_rightfbga12138a_parasitic.db/db_nd7mfbga12138a_parasitic.db/ddb_dspf_re_reduced_graph.ddb/ddb_nd7m-1_reva_900mv_0c.dmf.ddb/ddb_nd7m-1_reva_900mv_100c.dmf.ddb/ddb_nd7m-1_reva_900mv_110c.dmf.ddb/ddb_nd7m-1_reva_900mv_125c.dmf.ddb/ddb_nd7m-1_reva_900mv_n40c.dmf.ddb/ddb_nd7m-1_reva_vid1_0c.dmf.ddb/ddb_nd7m-1_reva_vid1_100c.dmf.ddb/ddb_nd7m-1_reva_vid1_110c.dmf.ddb/ddb_nd7m-1_reva_vid1_125c.dmf.ddb/ddb_nd7m-1_reva_vid1_n40c.dmf.ddb/ddb_nd7m-1_revb_900mv_0c.dmf.ddb/ddb_nd7m-1_revb_900mv_100c.dmf.ddb/ddb_nd7m-1_revb_900mv_110c.dmf.ddb/ddb_nd7m-1_revb_900mv_125c.dmf.ddb/ddb_nd7m-1_revb_900mv_n40c.dmf.ddb/ddb_nd7m-1_revb_vid1_0c.dmf.ddb/ddb_nd7m-1_revb_vid1_100c.dmf.ddb/ddb_nd7m-1_revb_vid1_110c.dmf.ddb/ddb_nd7m-1_revb_vid1_125c.dmf.ddb/ddb_nd7m-1_revb_vid1_n40c.dmf.ddb/ddb_nd7m-1_reves_900mv_0c.dmf.ddb/ddb_nd7m-1_reves_900mv_100c.dmf.ddb/ddb_nd7m-1_reves_900mv_110c.dmf.ddb/ddb_nd7m-1_reves_900mv_125c.dmf.ddb/ddb_nd7m-1_reves_900mv_n40c.dmf.ddb/ddb_nd7m-1_reves_vid1_0c.dmf.ddb/ddb_nd7m-1_reves_vid1_100c.dmf.ddb/ddb_nd7m-1_reves_vid1_110c.dmf.ddb/ddb_nd7m-1_reves_vid1_125c.dmf.ddb/ddb_nd7m-1_reves_vid1_n40c.dmf.ddb/ddb_nd7m-1_revesa_900mv_0c.dmf.ddb/ddb_nd7m-1_revesa_900mv_100c.dmf.ddb/ddb_nd7m-1_revesa_900mv_110c.dmf.ddb/ddb_nd7m-1_revesa_900mv_125c.dmf.ddb/ddb_nd7m-1_revesa_900mv_n40c.dmf.ddb/ddb_nd7m-1_revesa_vid1_0c.dmf.ddb/ddb_nd7m-1_revesa_vid1_100c.dmf.ddb/ddb_nd7m-1_revesa_vid1_110c.dmf.ddb/ddb_nd7m-1_revesa_vid1_125c.dmf.ddb/ddb_nd7m-1_revesa_vid1_n40c.dmf.ddb/ddb_nd7m-1_revprod_900mv_0c.dmf.ddb/ddb_nd7m-1_revprod_900mv_0c_fdi.ddb/ddb_nd7m-1_revprod_900mv_100c.dmf.ddb/ddb_nd7m-1_revprod_900mv_100c_fdi.ddb/ddb_nd7m-1_revprod_900mv_110c.dmf.ddb/ddb_nd7m-1_revprod_900mv_110c_dem.ddb/ddb_nd7m-1_revprod_900mv_110c_fdi.ddb/ddb_nd7m-1_revprod_900mv_125c.dmf.ddb/ddb_nd7m-1_revprod_900mv_n40c.dmf.ddb/ddb_nd7m-1_revprod_900mv_n40c_fdi.ddb/ddb_nd7m-1_revprod_vid1_0c.dmf.ddb/ddb_nd7m-1_revprod_vid1_0c_fdi.ddb/ddb_nd7m-1_revprod_vid1_100c.dmf.ddb/ddb_nd7m-1_revprod_vid1_100c_fdi.ddb/ddb_nd7m-1_revprod_vid1_110c.dmf.ddb/ddb_nd7m-1_revprod_vid1_110c_fdi.ddb/ddb_nd7m-1_revprod_vid1_125c.dmf.ddb/ddb_nd7m-1_revprod_vid1_n40c.dmf.ddb/ddb_nd7m-1_revprod_vid1_n40c_fdi.ddb/ddb_nd7m-2_reva_850mv_0c.dmf.ddb/ddb_nd7m-2_reva_850mv_100c.dmf.ddb/ddb_nd7m-2_reva_850mv_110c.dmf.ddb/ddb_nd7m-2_reva_850mv_125c.dmf.ddb/ddb_nd7m-2_reva_850mv_n40c.dmf.ddb/ddb_nd7m-2_reva_900mv_0c.dmf.ddb/ddb_nd7m-2_reva_900mv_100c.dmf.ddb/ddb_nd7m-2_reva_900mv_110c.dmf.ddb/ddb_nd7m-2_reva_900mv_125c.dmf.ddb/ddb_nd7m-2_reva_900mv_n40c.dmf.ddb/ddb_nd7m-2_reva_vid2_0c.dmf.ddb/ddb_nd7m-2_reva_vid2_100c.dmf.ddb/ddb_nd7m-2_reva_vid2_110c.dmf.ddb/ddb_nd7m-2_reva_vid2_125c.dmf.ddb/ddb_nd7m-2_reva_vid2_n40c.dmf.ddb/ddb_nd7m-2_revb_850mv_0c.dmf.ddb/ddb_nd7m-2_revb_850mv_0c_fdi.ddb/ddb_nd7m-2_revb_850mv_100c.dmf.ddb/ddb_nd7m-2_revb_850mv_100c_dem.ddb/ddb_nd7m-2_revb_850mv_100c_fdi.ddb/ddb_nd7m-2_revb_850mv_110c.dmf.ddb/ddb_nd7m-2_revb_850mv_125c.dmf.ddb/ddb_nd7m-2_revb_850mv_n40c.dmf.ddb/ddb_nd7m-2_revb_900mv_0c.dmf.ddb/ddb_nd7m-2_revb_900mv_100c.dmf.ddb/ddb_nd7m-2_revb_900mv_110c.dmf.ddb/ddb_nd7m-2_revb_900mv_125c.dmf.ddb/ddb_nd7m-2_revb_900mv_n40c.dmf.ddb/ddb_nd7m-2_revb_vid2_0c.dmf.ddb/ddb_nd7m-2_revb_vid2_100c.dmf.ddb/ddb_nd7m-2_revb_vid2_110c.dmf.ddb/ddb_nd7m-2_revb_vid2_125c.dmf.ddb/ddb_nd7m-2_revb_vid2_n40c.dmf.ddb/ddb_nd7m-2_reves_850mv_0c.dmf.ddb/ddb_nd7m-2_reves_850mv_0c_fdi.ddb/ddb_nd7m-2_reves_850mv_100c.dmf.ddb/ddb_nd7m-2_reves_850mv_100c_dem.ddb/ddb_nd7m-2_reves_850mv_100c_fdi.ddb/ddb_nd7m-2_reves_850mv_110c.dmf.ddb/ddb_nd7m-2_reves_850mv_125c.dmf.ddb/ddb_nd7m-2_reves_850mv_n40c.dmf.ddb/ddb_nd7m-2_reves_900mv_0c.dmf.ddb/ddb_nd7m-2_reves_900mv_100c.dmf.ddb/ddb_nd7m-2_reves_900mv_110c.dmf.ddb/ddb_nd7m-2_reves_900mv_125c.dmf.ddb/ddb_nd7m-2_reves_900mv_n40c.dmf.ddb/ddb_nd7m-2_reves_vid2_0c.dmf.ddb/ddb_nd7m-2_reves_vid2_100c.dmf.ddb/ddb_nd7m-2_reves_vid2_110c.dmf.ddb/ddb_nd7m-2_reves_vid2_125c.dmf.ddb/ddb_nd7m-2_reves_vid2_n40c.dmf.ddb/ddb_nd7m-2_revesa_850mv_0c.dmf.ddb/ddb_nd7m-2_revesa_850mv_100c.dmf.ddb/ddb_nd7m-2_revesa_850mv_110c.dmf.ddb/ddb_nd7m-2_revesa_850mv_125c.dmf.ddb/ddb_nd7m-2_revesa_850mv_n40c.dmf.ddb/ddb_nd7m-2_revesa_900mv_0c.dmf.ddb/ddb_nd7m-2_revesa_900mv_100c.dmf.ddb/ddb_nd7m-2_revesa_900mv_110c.dmf.ddb/ddb_nd7m-2_revesa_900mv_125c.dmf.ddb/ddb_nd7m-2_revesa_900mv_n40c.dmf.ddb/ddb_nd7m-2_revesa_vid2_0c.dmf.ddb/ddb_nd7m-2_revesa_vid2_100c.dmf.ddb/ddb_nd7m-2_revesa_vid2_110c.dmf.ddb/ddb_nd7m-2_revesa_vid2_125c.dmf.ddb/ddb_nd7m-2_revesa_vid2_n40c.dmf.ddb/ddb_nd7m-2_revprod_850mv_0c.dmf.ddb/ddb_nd7m-2_revprod_850mv_0c_fdi.ddb/ddb_nd7m-2_revprod_850mv_100c.dmf.ddb/ddb_nd7m-2_revprod_850mv_100c_dem.ddb/ddb_nd7m-2_revprod_850mv_100c_fdi.ddb/ddb_nd7m-2_revprod_850mv_110c.dmf.ddb/ddb_nd7m-2_revprod_850mv_110c_dem.ddb/ddb_nd7m-2_revprod_850mv_110c_fdi.ddb/ddb_nd7m-2_revprod_850mv_125c.dmf.ddb/ddb_nd7m-2_revprod_850mv_n40c.dmf.ddb/ddb_nd7m-2_revprod_850mv_n40c_fdi.ddb/ddb_nd7m-2_revprod_900mv_0c.dmf.ddb/ddb_nd7m-2_revprod_900mv_0c_fdi.ddb/ddb_nd7m-2_revprod_900mv_100c.dmf.ddb/ddb_nd7m-2_revprod_900mv_100c_dem.ddb/ddb_nd7m-2_revprod_900mv_100c_fdi.ddb/ddb_nd7m-2_revprod_900mv_110c.dmf.ddb/ddb_nd7m-2_revprod_900mv_110c_dem.ddb/ddb_nd7m-2_revprod_900mv_110c_fdi.ddb/ddb_nd7m-2_revprod_900mv_125c.dmf.ddb/ddb_nd7m-2_revprod_900mv_n40c.dmf.ddb/ddb_nd7m-2_revprod_900mv_n40c_fdi.ddb/ddb_nd7m-2_revprod_vid2_0c.dmf.ddb/ddb_nd7m-2_revprod_vid2_0c_fdi.ddb/ddb_nd7m-2_revprod_vid2_100c.dmf.ddb/ddb_nd7m-2_revprod_vid2_100c_fdi.ddb/ddb_nd7m-2_revprod_vid2_110c.dmf.ddb/ddb_nd7m-2_revprod_vid2_110c_fdi.ddb/ddb_nd7m-2_revprod_vid2_125c.dmf.ddb/ddb_nd7m-2_revprod_vid2_n40c.dmf.ddb/ddb_nd7m-2_revprod_vid2_n40c_fdi.ddb/ddb_nd7m-3_reva_850mv_0c.dmf.ddb/ddb_nd7m-3_reva_850mv_100c.dmf.ddb/ddb_nd7m-3_reva_850mv_110c.dmf.ddb/ddb_nd7m-3_reva_850mv_125c.dmf.ddb/ddb_nd7m-3_reva_850mv_n40c.dmf.ddb/ddb_nd7m-3_reva_900mv_0c.dmf.ddb/ddb_nd7m-3_reva_900mv_100c.dmf.ddb/ddb_nd7m-3_reva_900mv_110c.dmf.ddb/ddb_nd7m-3_reva_900mv_125c.dmf.ddb/ddb_nd7m-3_reva_900mv_n40c.dmf.ddb/ddb_nd7m-3_reva_vid3a_0c.dmf.ddb/ddb_nd7m-3_reva_vid3a_100c.dmf.ddb/ddb_nd7m-3_reva_vid3a_110c.dmf.ddb/ddb_nd7m-3_reva_vid3a_125c.dmf.ddb/ddb_nd7m-3_reva_vid3a_n40c.dmf.ddb/ddb_nd7m-3_revb_850mv_0c.dmf.ddb/ddb_nd7m-3_revb_850mv_100c.dmf.ddb/ddb_nd7m-3_revb_850mv_110c.dmf.ddb/ddb_nd7m-3_revb_850mv_125c.dmf.ddb/ddb_nd7m-3_revb_850mv_n40c.dmf.ddb/ddb_nd7m-3_revb_900mv_0c.dmf.ddb/ddb_nd7m-3_revb_900mv_100c.dmf.ddb/ddb_nd7m-3_revb_900mv_110c.dmf.ddb/ddb_nd7m-3_revb_900mv_125c.dmf.ddb/ddb_nd7m-3_revb_900mv_n40c.dmf.ddb/ddb_nd7m-3_revb_vid3a_0c.dmf.ddb/ddb_nd7m-3_revb_vid3a_100c.dmf.ddb/ddb_nd7m-3_revb_vid3a_110c.dmf.ddb/ddb_nd7m-3_revb_vid3a_125c.dmf.ddb/ddb_nd7m-3_revb_vid3a_n40c.dmf.ddb/ddb_nd7m-3_reves_850mv_0c.dmf.ddb/ddb_nd7m-3_reves_850mv_100c.dmf.ddb/ddb_nd7m-3_reves_850mv_110c.dmf.ddb/ddb_nd7m-3_reves_850mv_125c.dmf.ddb/ddb_nd7m-3_reves_850mv_n40c.dmf.ddb/ddb_nd7m-3_reves_900mv_0c.dmf.ddb/ddb_nd7m-3_reves_900mv_100c.dmf.ddb/ddb_nd7m-3_reves_900mv_110c.dmf.ddb/ddb_nd7m-3_reves_900mv_125c.dmf.ddb/ddb_nd7m-3_reves_900mv_n40c.dmf.ddb/ddb_nd7m-3_reves_vid3a_0c.dmf.ddb/ddb_nd7m-3_reves_vid3a_100c.dmf.ddb/ddb_nd7m-3_reves_vid3a_110c.dmf.ddb/ddb_nd7m-3_reves_vid3a_125c.dmf.ddb/ddb_nd7m-3_reves_vid3a_n40c.dmf.ddb/ddb_nd7m-3_revesa_850mv_0c.dmf.ddb/ddb_nd7m-3_revesa_850mv_100c.dmf.ddb/ddb_nd7m-3_revesa_850mv_110c.dmf.ddb/ddb_nd7m-3_revesa_850mv_125c.dmf.ddb/ddb_nd7m-3_revesa_850mv_n40c.dmf.ddb/ddb_nd7m-3_revesa_900mv_0c.dmf.ddb/ddb_nd7m-3_revesa_900mv_100c.dmf.ddb/ddb_nd7m-3_revesa_900mv_110c.dmf.ddb/ddb_nd7m-3_revesa_900mv_125c.dmf.ddb/ddb_nd7m-3_revesa_900mv_n40c.dmf.ddb/ddb_nd7m-3_revesa_vid3a_0c.dmf.ddb/ddb_nd7m-3_revesa_vid3a_100c.dmf.ddb/ddb_nd7m-3_revesa_vid3a_110c.dmf.ddb/ddb_nd7m-3_revesa_vid3a_125c.dmf.ddb/ddb_nd7m-3_revesa_vid3a_n40c.dmf.ddb/ddb_nd7m-3_revprod_850mv_0c.dmf.ddb/ddb_nd7m-3_revprod_850mv_0c_fdi.ddb/ddb_nd7m-3_revprod_850mv_100c.dmf.ddb/ddb_nd7m-3_revprod_850mv_100c_fdi.ddb/ddb_nd7m-3_revprod_850mv_110c.dmf.ddb/ddb_nd7m-3_revprod_850mv_110c_dem.ddb/ddb_nd7m-3_revprod_850mv_110c_fdi.ddb/ddb_nd7m-3_revprod_850mv_125c.dmf.ddb/ddb_nd7m-3_revprod_850mv_n40c.dmf.ddb/ddb_nd7m-3_revprod_850mv_n40c_fdi.ddb/ddb_nd7m-3_revprod_900mv_0c.dmf.ddb/ddb_nd7m-3_revprod_900mv_0c_fdi.ddb/ddb_nd7m-3_revprod_900mv_100c.dmf.ddb/ddb_nd7m-3_revprod_900mv_100c_dem.ddb/ddb_nd7m-3_revprod_900mv_100c_fdi.ddb/ddb_nd7m-3_revprod_900mv_110c.dmf.ddb/ddb_nd7m-3_revprod_900mv_110c_dem.ddb/ddb_nd7m-3_revprod_900mv_110c_fdi.ddb/ddb_nd7m-3_revprod_900mv_125c.dmf.ddb/ddb_nd7m-3_revprod_900mv_n40c.dmf.ddb/ddb_nd7m-3_revprod_900mv_n40c_fdi.ddb/ddb_nd7m-3_revprod_vid3a_0c.dmf.ddb/ddb_nd7m-3_revprod_vid3a_0c_fdi.ddb/ddb_nd7m-3_revprod_vid3a_100c.dmf.ddb/ddb_nd7m-3_revprod_vid3a_100c_fdi.ddb/ddb_nd7m-3_revprod_vid3a_110c.dmf.ddb/ddb_nd7m-3_revprod_vid3a_110c_fdi.ddb/ddb_nd7m-3_revprod_vid3a_125c.dmf.ddb/ddb_nd7m-3_revprod_vid3a_n40c.dmf.ddb/ddb_nd7m-3_revprod_vid3a_n40c_fdi.ddb/ddb_nd7m-ff_reva_800mv_0c.dmf.ddb/ddb_nd7m-ff_reva_800mv_100c.dmf.ddb/ddb_nd7m-ff_reva_800mv_110c.dmf.ddb/ddb_nd7m-ff_reva_800mv_125c.dmf.ddb/ddb_nd7m-ff_reva_800mv_n40c.dmf.ddb/ddb_nd7m-ff_reva_850mv_0c.dmf.ddb/ddb_nd7m-ff_reva_850mv_100c.dmf.ddb/ddb_nd7m-ff_reva_850mv_110c.dmf.ddb/ddb_nd7m-ff_reva_850mv_125c.dmf.ddb/ddb_nd7m-ff_reva_850mv_n40c.dmf.ddb/ddb_nd7m-ff_reva_900mv_0c.dmf.ddb/ddb_nd7m-ff_reva_900mv_100c.dmf.ddb/ddb_nd7m-ff_reva_900mv_110c.dmf.ddb/ddb_nd7m-ff_reva_900mv_125c.dmf.ddb/ddb_nd7m-ff_reva_900mv_n40c.dmf.ddb/ddb_nd7m-ff_reva_vid1_0c.dmf.ddb/ddb_nd7m-ff_reva_vid1_100c.dmf.ddb/ddb_nd7m-ff_reva_vid1_110c.dmf.ddb/ddb_nd7m-ff_reva_vid1_125c.dmf.ddb/ddb_nd7m-ff_reva_vid1_n40c.dmf.ddb/ddb_nd7m-ff_revb_800mv_0c.dmf.ddb/ddb_nd7m-ff_revb_800mv_100c.dmf.ddb/ddb_nd7m-ff_revb_800mv_110c.dmf.ddb/ddb_nd7m-ff_revb_800mv_125c.dmf.ddb/ddb_nd7m-ff_revb_800mv_n40c.dmf.ddb/ddb_nd7m-ff_revb_850mv_0c.dmf.ddb/ddb_nd7m-ff_revb_850mv_100c.dmf.ddb/ddb_nd7m-ff_revb_850mv_110c.dmf.ddb/ddb_nd7m-ff_revb_850mv_125c.dmf.ddb/dd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filenames: common
filetypes: d
dirname:
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filenames: alt_aeuex_sys_pll_sv_100_0002.qip/alt_aeuex_sys_pll_sv_100_0002.v
filetypes: ff
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filenames: alt_aeu_100_ack_skid.v/alt_e100_status_sync.v/alt_e100_sync_arst.v/e100_sync_arst.v/reverse_words.v
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filetypes: ffffff
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filenames:
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filenames: phylite_reset_handler.sv
filetypes: f
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filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
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filenames: alt_aeu_40_pfc_top.v
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filenames:
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filenames: altera_xcvr_10gkr_s10/common_src/cpu/design_example/reconfig
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filenames: auk_dspip_ctc_ast_block_sink.vhd
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filenames: altera_emr_unloader_hw.tcl/altera_emr_unloader_wizard.lst
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filenames: src_hdl
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dirname:
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filenames: src_hdl
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filetypes: dffddfdd
dirname:
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filenames:
[cell repeats an earlier one in this file: 124 characters]


filetypes: fffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: c3_function.c
filetypes: f
dirname:
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filenames: j204c_rx_regmap.v
filetypes: f
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filenames: loopback_top.v.terp/pfd/reclock
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dirname:
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filenames: kr
filetypes: d
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filetypes: ffffffdfdd
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filenames:
[cell repeats an earlier one in this file: 183 characters]


filenames: altera_eth_avst2gmii_converter.v
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filenames: alt_vip_common_to_binary.v
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filenames: alt_vip_common_sample_counter.v
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filenames: altera_merlin_ahb_slave_agent.sv.terp/altera_merlin_ahb_slave_agent_hw.tcl
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filenames: altera_eth_mdio.v
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filenames: rnr_avmm_reconfig.sv/rnr_pipe_direct_rate_change_control.sv/rnr_rate_change_control.sv
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filenames: ncsim_wave.tcl/tb_run.sh
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filenames:
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filenames: rnr_pcie_ehp_pack/rnr_pcie_ehp_tx_deallocate_ctr.sv/rnr_pcie_ehp_unpack/rnr_pcie_ehp_wrapper.sv
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filenames: altpcietb_bfm_cfbp.v/altpcietb_bfm_driver_cfgbp.v/altpcietb_bfm_rp_g3x8_cfgbp.v
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filenames:
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filenames: aldec/altera_rs_ser_bm.ocp/altera_rs_ser_bm.sv/altera_rs_ser_bm_hw.tcl/cadence/mentor/synopsys
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filenames: alt_e40_jtag_avmm.v/alt_e40_reset_controller.v
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filenames: xcvr_pcie_hip_native_fmh.sdc.terp/xcvr_pcie_hip_native_fmh_hw.tcl
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filenames: src_hdl
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filenames: class.ptf/em_pipeline_bridge.pl/em_pipeline_bridge.pm
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filenames: alt_e40_adapter.v/alt_e40_wide_l2if_rx_mux.v/alt_e40_wide_l2if_tx.v
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filenames: altera_avalon_mailbox_simple.c
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filenames:
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filenames: alt_vip_common_shift_mux.sv
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filenames:
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filenames: altera_eth_pad_inserter.v
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filenames: mem_ss_base_csr_regs.ipxact
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filenames:
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filenames: alt_e50s10_fc_top.v/alt_e50s10_rx_fc.v/alt_e50s10_tx_fc.v/alt_e50s10_tx_fc_frame_muxer.v
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filenames: altera_eth_preamble_inserter.v
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filenames: altera_xcvr_native_cv_wizard.lst/pkgIndex.tcl/presets/tcl
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filenames: tb_run.sh/xcelium_wave.tcl
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filenames: intel_pcie_bam/intel_pcie_bam_v2
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