# filelist

filenames: alt_e40_jtag_avmm.v/alt_e40_rcfg_arb.sv/alt_e40_reset_controller.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40emu/40g/synopsys/rtl/top


filenames: ilk_oob_flow_rx.v/ilk_oob_flow_rx_dcfifo.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_interlaken_hp/ilk_oob/ilk_oob_rx


filenames: alt_aeu_100_ack_skid.v/alt_e100_status_sync.v/alt_e100_sync_arst.v/e100_sync_arst.v/reverse_words.v
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/100g/rtl/lib


filenames: basic.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII_1588v2/hwtesting/system_console/basic


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/sv_soft_10gbaser/synopsys/sv_soft_pcs

filenames:
[cell repeats an earlier one in this file: 518 characters]


filenames: auk_dspip_ctc_ast_block_sink.vhd
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_turbo/LTE/aldec/src/rtl/ast


filenames: intel_vvp_warp_mem.sv/intel_vvp_warp_mem_read.sv/intel_vvp_warp_mem_write.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/imported/warp/intel_vvp_warp_mem_ctrl/cadence/src_hdl


filenames: s5mlab.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e100s10/hsl18/s10/aldec


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e25s10/25g/rtl/efc

filenames:
[cell repeats an earlier one in this file: 115 characters]


filenames: mon_inc.tcl/mon_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE/hwtesting/system_console/traffic_controller/mon


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/native_mac/twentynm_mac_native_hw

filenames:
[cell repeats an earlier one in this file: 208 characters]


filenames: altpcie_a10_hip_ast_translator.sv/altpcie_ast_translator.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_a10_hip/cadence/a10_hip_ast_translator


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_rtile/pcie/common/tcl

filenames:
[cell repeats an earlier one in this file: 298 characters]


filenames: alt_e40_e4x10_base.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/phy/pma_siv/alt_e40_e4x10


filenames: eth_f_hw_top_avmm_decoder.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/dr_f/aldec/example_project/common/eth_dr_ed/eth_25g_nrz


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_rolling_bars_alg_core/intelfpga


filenames: alt_vip_clipper_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_clipper_scheduler/cadence/src_hdl


filetypes: ffffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC_CPRI/software/dynamic_reconfiguration_sim

filenames:
  c3_reconfig.c/c3_reconfig.h/main.c/nios_system_oc_mem2_0_onchip_memory2_0.hex/packet_gen.c/packet_gen.h/s10


filetypes: ddddddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl_legacy/whr_adapters

filenames:
[cell repeats an earlier one in this file: 160 characters]


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpcv_5g/src/spyglass/rtl/ldpcEnc

filenames:
[cell repeats an earlier one in this file: 241 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/ptile/common/rtl/aldec/whr_adapters/adapter_rearch/mainband

filenames:
[cell repeats an earlier one in this file: 191 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_seq_par_convert/synopsys


filenames: intel_vvp_ro_reg_servicer.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_ro_reg_servicer/synopsys/src_hdl


filenames: tse_mac_inc.tcl/tse_mac_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/altera_eth_tse_design_example/tse_ieee1588_s10etile/hardware_test_design/sc/tse_mac


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpc_5g/src/enc/synopsys/rtl/core

filenames:
[cell repeats an earlier one in this file: 103 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ilk/ftile/testbench/debug_stp

filenames:
[cell repeats an earlier one in this file: 255 characters]


filenames: alt_vip_vfb_wr_ctrl.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_vfb_wr_ctrl/synopsys/src_hdl


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_etile_data_mapping

filenames:
[cell repeats an earlier one in this file: 100 characters]


filenames: edid_ram.tcl.terp/hdmi_rx_top.v.terp
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/hw_demo/s10_frl_demo/rtl/hdmi_rx


filenames: alt_e100_sys_pll_sv_100/alt_e100_sys_pll_sv_100.qip/alt_e100_sys_pll_sv_100.v
filetypes: dff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/100gbe/example/common/alt_e100_sys_pll_sv_100


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/avmm_bridge_512/synopsys/rddm_ext_tag

filenames:
[cell repeats an earlier one in this file: 280 characters]


filetypes: fffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ilk/ftile/uflex_ilk_soft_pcs/intelfpga

filenames:
[cell repeats an earlier one in this file: 1072 characters]


filenames: address_decoder_top_altera_merlin_master_agent_191_mpbm6tq.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/altera_eth_tse/example_project/common/hw/dec/top/altera_merlin_master_agent


filenames: alt_vip_cps_scheduler.sv/alt_vip_cps_scheduler_core.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_cps_scheduler/intelfpga/src_hdl


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/audio_ip/audio_extract/synopsys


filenames: run_vcs.sh/run_vcsmx.sh
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_RSFEC/example_testbench/s10/synopsys


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/intelfpga/modules/alt_vip_common_slave_interface


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_sop_align


filenames: altera_avalon_st_idle_remover.v/altera_avalon_st_idle_remover_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_st_idle_remover


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/avmm_bridge_512_ed/intel_pcie_tgc

filenames:
[cell repeats an earlier one in this file: 182 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/aldec/modules/alt_vip_common_fifo2


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/40g/aldec


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_ed/altera_avalon_dma

filenames:
[cell repeats an earlier one in this file: 127 characters]


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/audio_ip/clocked_audio_output/mentor/src_hdl

filenames:
[cell repeats an earlier one in this file: 106 characters]


filetypes: ffffffffdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_dp/software/btc_dptx_syslib

filenames:
[cell repeats an earlier one in this file: 129 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_dil_weave_scheduler/intelfpga


filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/kr4_sv/aldec/sv_fec

filenames:
[cell repeats an earlier one in this file: 1363 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sld/st/intel_st_debug_if/intelfpga

filenames:
[cell repeats an earlier one in this file: 199 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_packet_discard/mentor


filetypes: ffffffdfdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE

filenames:
[cell repeats an earlier one in this file: 183 characters]


filenames: alt_vip_line_stats.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_line_stats/aldec/src_hdl


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/hdl_modules/clock_crossing/mentor

filenames:
  intel_vab_binary_to_gray.sv/intel_vab_clock_crosser.sv/intel_vab_counter_clock_crosser.sv/intel_vab_flop_primitive.sv/intel_vab_gray_to_binary.sv/intel_vab_ring_clock_crosser.sv/intel_vab_synchronizer_flop.sv


filenames: alt_vip_message_width_adapt.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_message_width_adapt/cadence/src_hdl


filenames: alt_vip_line_stats.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_line_stats/src_hdl


filenames: intel_vvp_clocked_video_sink_bfm_hw.tcl/src_hdl
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/verification_library/clocked_video_bfms/intel_vvp_clocked_video_sink_bfm


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_crs_v_down_core/src_hdl

filenames:
[cell repeats an earlier one in this file: 144 characters]


filenames: apn_fftfp_dft4_hdfp.vhd/apn_fftfp_fft4_hdfp.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_fft_ii/src/rtl/lib/mr42/hdfp


filenames: altera_eth_tse_mac.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_mac/cadence


filetypes: ddfffffffffffddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_onchip_flash/altera_onchip_flash

filenames:
  HAL/aldec/altera_onchip_flash.sdc/altera_onchip_flash.v/altera_onchip_flash_avmm_csr_controller.v/altera_onchip_flash_avmm_data_controller.v/altera_onchip_flash_avmm_p_to_s_data_controller.v/altera_onchip_flash_avmm_serial_data_controller.v/altera_onchip_flash_hw.tcl/altera_onchip_flash_hw_proc.tcl/altera_onchip_flash_sim.v/altera_onchip_flash_sw.tcl/altera_onchip_flash_util.v/cadence/inc/intelfpga/mentor/synopsys


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/emif/ip_mem_model/ip_core_ddr4

filenames:
[cell repeats an earlier one in this file: 189 characters]


filetypes: fffdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/verification/altera_nios2_custom_instr_master_bfm

filenames:
  altera_nios2_custom_instr_master_bfm.sv/altera_nios2_custom_instr_master_bfm_hw.tcl/altera_nios2_custom_instr_master_bfm_vhdl_wrapper.sv/intelfpga/mentor


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_bars_alg_core/aldec/src_hdl

filenames:
[cell repeats an earlier one in this file: 102 characters]


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/mentor_vip_ae/axi3/qsys-examples/ex1_back_to_back_sv/ip/ex1_back_to_back_sv

filenames:
  ex1_back_to_back_sv_clk_0.ip/ex1_back_to_back_sv_mgc_axi_inline_monitor_0.ip/ex1_back_to_back_sv_mgc_axi_master_0.ip/ex1_back_to_back_sv_mgc_axi_slave_0.ip


filetypes: fffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ilk/ftile/uflex_ilk_soft_pcs/aldec

filenames:
[cell repeats an earlier one in this file: 1072 characters]


filenames: altpcierd_tl_cfg_sample.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_ed/example_design/verilog/chaining_dma


filenames: pkgIndex.tcl/tcl
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_pll/mcgb_package_s10


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_line_buffer/cadence


filenames: cm_rule_basic_standard_pcs.tcl/cm_rule_basic_standard_pcs_tb.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_native_phy/altera_xcvr_native_s20_common_design_example_rules/cm_rule_basic_standard_pcs


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/altera_eth_tse/example_project/common/hw/dec/top/altera_merlin_multiplexer

filenames:
[cell repeats an earlier one in this file: 275 characters]


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/intel_fpga_ldpc_5g/src/dec/c/txt/one_at_head

filenames:
[cell repeats an earlier one in this file: 134 characters]


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_native_phy/altera_xcvr_native_vi/pcie_dfe_ip

filenames:
[cell repeats an earlier one in this file: 180 characters]


filenames: intel_vvp_cvi_remap.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/cv_intf/rx/synopsys


filetypes: dfffffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_dma

filenames:
[cell repeats an earlier one in this file: 130 characters]


filenames: altera_nios2_custom_instr_master_bfm.sv/altera_nios2_custom_instr_master_bfm_vhdl_wrapper.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/verification/altera_nios2_custom_instr_master_bfm/intelfpga


filenames: system_console
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G/hwtesting


filenames: source
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_pll/altera_xcvr_atx_pll_vi/mentor


filenames: altpcie_s10_tbed_bfm_hwtcl.v/altpcie_s10_tbed_hwtcl.v/verilog
filetypes: ffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_tbed/intelfpga


filenames: c3_reconfig.c/c3_reconfig.h/flow.c/main.c/packet_gen.c/packet_gen.h/readme.txt/s10
filetypes: fffffffd
dirname:
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filenames: alt_vip_cl_scl_hw.tcl/alt_vip_cl_scl_sw.tcl
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filenames:
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filenames: aldec/cadence/intel_vvp_warp_r2b_hw.tcl/intelfpga/mentor/src_hdl/synopsys
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filenames: tb_run.sh/tb_top.ucli.txt/vcs_wave.tcl
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filenames: harq/ldpcCd/ldpcCe/ldpcDec/ldpcDrm/ldpcEnc/ldpcRm
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filenames: src_hdl
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filenames: src_hdl
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filenames: src_hdl
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filenames: src_hdl
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filenames: alt_vip_common_sync.v
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filetypes: ffffffffffff
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filenames:
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filenames: alt_vip_cpp_converter.sv
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filetypes: ffffffffffffffffffffffffffffff
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filenames:
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filenames: common_files
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filenames: c3_reconfig.c/c3_reconfig.h/main.c/nios_system_oc_mem2_0_onchip_memory2_0.hex
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filetypes: fffffffffffffffffffffffffffffffff
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filenames: altera_rs_ser_transaction_format_adapter.sv
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filenames: intel_vvp_axi4_stream_slave_bfm.sv
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filenames:
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filenames: alt_vip_common_latency_1_to_latency_0.sv/alt_vip_common_video_packet_decode.sv
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filenames: seriallite4_phy_adapter.sv/seriallite4_phy_adapter_pam4.sv
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filenames: intel_vvp_core.h/intel_vvp_core_regs.h/intel_vvp_quantizer.h
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filetypes: fffff
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filenames:
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filenames: alt_vip_stream_cleaner_alg_core.sv
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filenames:
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filenames: alt_vip_warp_ac.sv/alt_vip_warp_bilinear_ac.sv
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filenames: auk_vit_par_ber_atl.vhd/auk_vit_par_bmp_atl.vhd/auk_vit_par_top_atl.vhd/auk_vit_par_trb_atl.vhd
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filenames: alt_xcvr_rst_conduit_adaptor.v/alt_xcvr_rst_conduit_adaptor_hw.tcl
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filetypes: dffffffffdddd
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filenames: src_hdl
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filenames: intel_vvp_clocked_video_source_bfm_hw.tcl/src_hdl
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filetypes: fffffffffffffff
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filenames:
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filenames: altera_eth_tse_pcs_pma_nf_phyip.v
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dirname:
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filetypes: fffffffffffff
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filenames:
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filenames: altera_eth_pfc_pause_conversion.v
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filenames: alt_ehipc2_rx_deskew.sv/alt_ehipc2_tx_deskew.sv/alt_ehipc2_word_delay_mlab.sv
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filenames: alt_vip_vfb_linebuf_ctrl.sv
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filenames: src_hdl
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filenames:
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filenames: common/fm/s10
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filenames:
  aldec/alt_ntrlkn_8l_6g_align_dcf.v/alt_ntrlkn_8l_6g_align_fifo.v/alt_ntrlkn_8l_6g_alignment_pipe.v/alt_ntrlkn_8l_6g_arbiter.v/alt_ntrlkn_8l_6g_avalon_to_ilk_adapter_4.v/alt_ntrlkn_8l_6g_buffer_1_to_2.v/alt_ntrlkn_8l_6g_buffer_2_to_1.v/alt_ntrlkn_8l_6g_buffered_read_scheduler_4.v/alt_ntrlkn_8l_6g_channel_fifo.v/alt_ntrlkn_8l_6g_compact_words_4.v/alt_ntrlkn_8l_6g_crc24_dat64.v/alt_ntrlkn_8l_6g_crc24_dat64_factor.v/alt_ntrlkn_8l_6g_crc24_dat64_flat.v/alt_ntrlkn_8l_6g_crc24_dat64_only_flat.v/alt_ntrlkn_8l_6g_crc24_multiple_upto2.v/alt_ntrlkn_8l_6g_crc24_multiple_upto3.v/alt_ntrlkn_8l_6g_crc24_multiple_upto4.v/alt_ntrlkn_8l_6g_crc24_multiple_upto5.v/alt_ntrlkn_8l_6g_crc24_zer64_flat.v/alt_ntrlkn_8l_6g_crc24_zer64x10_flat.v/alt_ntrlkn_8l_6g_crc24_zer64x2_flat.v/alt_ntrlkn_8l_6g_crc24_zer64x3_flat.v/alt_ntrlkn_8l_6g_crc24_zer64x4_flat.v/alt_ntrlkn_8l_6g_crc24_zer64x5_flat.v/alt_ntrlkn_8l_6g_crc32c_dat64.v/alt_ntrlkn_8l_6g_crc32c_dat64_factor.v/alt_ntrlkn_8l_6g_crc32c_dat64_flat.v/alt_ntrlkn_8l_6g_crc32c_dat64_only.v/alt_ntrlkn_8l_6g_crc32c_dat64_only_factor.v/alt_ntrlkn_8l_6g_crc32c_dat64_only_flat.v/alt_ntrlkn_8l_6g_crc32c_zer64.v/alt_ntrlkn_8l_6g_crc32c_zer64_factor.v/alt_ntrlkn_8l_6g_crc32c_zer64_flat.v/alt_ntrlkn_8l_6g_dec_67_64.v/alt_ntrlkn_8l_6g_enc_64_67.v/alt_ntrlkn_8l_6g_fifo_36_to_72.v/alt_ntrlkn_8l_6g_fifo_72_to_36.v/alt_ntrlkn_8l_6g_frame_sync_control.v/alt_ntrlkn_8l_6g_gearbox_20_67.v/alt_ntrlkn_8l_6g_gearbox_67_20.v/alt_ntrlkn_8l_6g_hw.tcl/alt_ntrlkn_8l_6g_ilk_to_avalon_adapter_4.v/alt_ntrlkn_8l_6g_lal_cfifo.v/alt_ntrlkn_8l_6g_lal_dcfifo.v/alt_ntrlkn_8l_6g_lal_dfifo_auto.v/alt_ntrlkn_8l_6g_lane_alignment.v/alt_ntrlkn_8l_6g_lane_alignment_nav.v/alt_ntrlkn_8l_6g_lane_alignment_ram.v/alt_ntrlkn_8l_6g_lane_rx.v/alt_ntrlkn_8l_6g_lane_rx_crc.v/alt_ntrlkn_8l_6g_lane_status_monitor.v/alt_ntrlkn_8l_6g_lane_tx.v/alt_ntrlkn_8l_6g_lane_tx_crc.v/alt_ntrlkn_8l_6g_packet_annotate.v/alt_ntrlkn_8l_6g_packet_regroup_4.v/alt_ntrlkn_8l_6g_pipelined_any_flag.v/alt_ntrlkn_8l_6g_ram_navigate.v/alt_ntrlkn_8l_6g_read_calendar_4.v/alt_ntrlkn_8l_6g_read_calendar_single_page_4.v/alt_ntrlkn_8l_6g_read_scheduler_4.v/alt_ntrlkn_8l_6g_ready_skid.v/alt_ntrlkn_8l_6g_regroup_4.v/alt_ntrlkn_8l_6g_routing_pipe.v/alt_ntrlkn_8l_6g_rx_8lane.v/alt_ntrlkn_8l_6g_rx_buffer_fifo_2.v/alt_ntrlkn_8l_6g_rx_channel_filter_4.v/alt_ntrlkn_8l_6g_rx_crc24_check_4.v/alt_ntrlkn_8l_6g_rx_datapath_8lane.v/alt_ntrlkn_8l_6g_rx_stripe_adapter.v/alt_ntrlkn_8l_6g_scrambler_lfsr.v/alt_ntrlkn_8l_6g_sim_packet_client.v/alt_ntrlkn_8l_6g_six_three_comp.v/alt_ntrlkn_8l_6g_sum_of_3bit_pair.v/alt_ntrlkn_8l_6g_synchronizer.v/alt_ntrlkn_8l_6g_ternary_add.v/alt_ntrlkn_8l_6g_twelve_four_comp.v/alt_ntrlkn_8l_6g_tx_2channel_arbiter.v/alt_ntrlkn_8l_6g_tx_4channel_arbiter.v/alt_ntrlkn_8l_6g_tx_8lane.v/alt_ntrlkn_8l_6g_tx_buffer_fifo_8word.v/alt_ntrlkn_8l_6g_tx_buffer_fifo_nav.v/alt_ntrlkn_8l_6g_tx_buffer_fifo_ram.v/alt_ntrlkn_8l_6g_tx_buffer_fifo_ram_loose.v/alt_ntrlkn_8l_6g_tx_control_insertion_4.v/alt_ntrlkn_8l_6g_tx_crc24_insertion_4.v/alt_ntrlkn_8l_6g_tx_datapath_8lane.v/alt_ntrlkn_8l_6g_tx_flow_adapter.v/alt_ntrlkn_8l_6g_tx_stripe_adapter.v/alt_ntrlkn_8l_6g_wide_word_ram.v/alt_ntrlkn_8l_6g_wide_word_ram_4.v/alt_ntrlkn_8l_6g_word_align_control.v/alt_ntrlkn_8l_6g_xcvr_8lane.v/alt_ntrlkn_8l_6g_xor6.v/cadence/intelfpga/mentor/synopsys


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/schedulers/intel_vvp_pip_conv_scheduler/mentor


filenames: ast2avmm_512_c2e_ed_hwtcl.sv/ast2avmm_512_ed_hwtcl.sv/intel_pcie_ed_512
filetypes: ffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_ed/aldec/ast2avmm_512_ed


filetypes: ffffff
dirname:
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filenames:
[cell repeats an earlier one in this file: 116 characters]


filenames: altera_emif_ddrt_sda_bidir.sdc/altera_emif_ddrt_sda_bidir.v/altera_emif_ddrt_sda_bidir_hw.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/emif/ip_ddrt/altera_emif_ddrt_sda_bidir


filenames: intel_vvp_csc_algo_comp.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_csc_algo_comp/intelfpga/src_hdl


filenames: hyper_opt_OFF_pkg.vhd/hyper_opt_ON_pkg.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_fft_ii/src/rtl/lib/common/hyper_opt_pkg


filenames: marvell_phy.tcl/marvell_phy_reg_map.tcl/sfpp_i2c.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE_1588v2/hwtesting/system_console/external_phy/marvell


filenames: altera_avalon_spi_regs.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_spi/inc


filenames: alt_vip_pip_converter_core.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_pip_converter_core/cadence/src_hdl


filenames: common_files
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/intelfpga/example_testbench


filenames: intel_vvp_cvo_remap.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/cv_intf/tx/synopsys


filetypes: fffff
dirname:
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filenames:
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filenames: pkgIndex.tcl/tcl/terp
filetypes: fdd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/stratix10/altera_xcvr_10gkr_s10


filetypes: fffff
dirname:
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filenames:
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filetypes: ffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550_kr/intelfpga/rtl

filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/seriallite_iii/src/common/phyip

filenames:
[cell repeats an earlier one in this file: 1018 characters]


filenames: s10_rp_avmm_master_hwtcl.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_ed/aldec/s10_rp_avmm_master


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sld/trace/core/altera_trace_capture_controller

filenames:
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filetypes: ddfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/sv_fec

filenames:
  aldec/cadence/hd_dpcmn_bitsync.v/hd_dpcmn_bitsync2.v/hd_dpcmn_bitsync3.v/hd_dpcmn_bitsync4.v/hd_dpcmn_dprio_csr_reg_bit.v/hd_dpcmn_dprio_csr_reg_nbits.v/hd_dpcmn_dprio_csr_reg_nregs.v/hd_dpcmn_dprio_csr_test_mux.v/hd_dpcmn_dprio_ctrl_reg_bit.v/hd_dpcmn_dprio_ctrl_reg_nbits.v/hd_dpcmn_dprio_ctrl_reg_nregs.v/hd_dpcmn_dprio_ctrl_stat_interface_top.v/hd_dpcmn_dprio_ctrl_stat_reg_chnl.v/hd_dpcmn_dprio_ctrl_stat_reg_top.v/hd_dpcmn_dprio_ctrl_stat_reg_w_resvrd_chnl.v/hd_dpcmn_dprio_ctrl_stat_reg_w_resvrd_top.v/hd_dpcmn_dprio_dis_ctrl_cvp.v/hd_dpcmn_dprio_readdata_mux.v/hd_dpcmn_dprio_readdata_mux_mod.v/hd_dpcmn_dprio_readdata_sel.v/hd_dpcmn_dprio_shadow_status_nregs.v/hd_dpcmn_dprio_shadow_status_regs.v/hd_dpcmn_dprio_status_reg_nbits.v/hd_dpcmn_dprio_status_reg_nregs.v/hd_dpcmn_dprio_status_sync_regs.v/hd_krfec.v/hd_krfec_blksync.v/hd_krfec_chk4_syndrm.v/hd_krfec_cmpt4syndrm_chk.v/hd_krfec_cmpt_syndrm.v/hd_krfec_decoder.v/hd_krfec_decoder_master_sm.v/hd_krfec_decoder_rd_sm.v/hd_krfec_decoder_sm.v/hd_krfec_descrm.v/hd_krfec_dpbuff.v/hd_krfec_encoder.v/hd_krfec_errcorrect.v/hd_krfec_errtrap.v/hd_krfec_errtrap_ind.v/hd_krfec_errtrap_lfsr.v/hd_krfec_errtrap_loc.v/hd_krfec_errtrap_pat.v/hd_krfec_errtrap_sm.v/hd_krfec_fast_search.v/hd_krfec_fast_search_sm.v/hd_krfec_gearbox_exp.v/hd_krfec_gearbox_red.v/hd_krfec_gx_64b.v/hd_krfec_head_tail_gen.v/hd_krfec_lock_sm.v/hd_krfec_nto1mux.v/hd_krfec_parity_chk.v/hd_krfec_parity_gen.v/hd_krfec_pulse_stretch.v/hd_krfec_rx_async_pld_out.v/hd_krfec_rx_chnl.v/hd_krfec_rx_testbus.v/hd_krfec_rxrst_ctrl.v/hd_krfec_scramble.v/hd_krfec_shf1_syndrm.v/hd_krfec_shf2_syndrm.v/hd_krfec_shf3_syndrm.v/hd_krfec_shf4_syndrm.v/hd_krfec_syndrm_sm.v/hd_krfec_top_wrapper.ocp/hd_krfec_top_wrapper.v/hd_krfec_transcode_dec.v/hd_krfec_transcode_enc.v/hd_krfec_tx_async_pld_out.v/hd_krfec_tx_chnl.v/hd_krfec_tx_testbus.v/hd_krfec_wdalign.v/intelfpga/mentor/synopsys


filenames: altera_up_avalon_audio_and_video_config.h/altera_up_avalon_audio_and_video_config_regs.h
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/university_program/audio_video/altera_up_avalon_audio_and_video_config/HAL/inc


filenames: aldec/alt_vip_cadence_detect_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_cadence_detect


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/mac/cadence/common

filenames:
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filenames: altera_jesd204_mixed_width_dcfifo.v/altera_jesd204_pcfifo.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_jesd204/src/lib/pcfifo/mentor


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_crs_h_up_algo_comp/intelfpga


filetypes: fffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/altera_eth_tse_design_example/tse_ieee1588_s10etile/hardware_test_design

filenames:
  alt_mge_channel.v/alt_mge_multi_channel.sv/altera_eth_top.qpf/altera_eth_top.qsf.terp/altera_eth_top.sdc/altera_eth_top.sv/altera_eth_top_devkit.qsf.terp/common/ip/sc


filenames: eip_n3xs_gbox_a2b.sv/eip_n3xs_gbox_b2a.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ilk/ftile/soft_gearbox/mentor


filetypes: ffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/dr_f/intelfpga/rtl/source

filenames:
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filetypes: dffffddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40/40g_kr4_s10

filenames:
  aldec/alt_e40_rcfg_data.sv.terp/alt_e40_rcfg_top.sv.terp/alt_e40_s10_kr4.sdc.terp/alt_e40_s10_kr4.sv.terp/cadence/common_src/cpu/intelfpga/mentor/reconfig/synopsys


filenames: alt_vip_seq_par_convert.sv
filetypes: f
dirname:
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filenames: altera_lvds_common14.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_lvds/altera_lvds_core14/mentor


filenames: auk_dspip_ctc_decoder_et_top.vhd/auk_dspip_ctc_et_ast_source.vhd/auk_dspip_memory_simple_dual.vhd
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_turbo/LTE/cadence/src/rtl/wrapper


filenames: src_hdl
filetypes: d
dirname:
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filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/MAC/mentor/adapters/altera_eth_xgmii_data_format_adapter

filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_rtile/pcie/common/rtl/spyglass/soft_wrapper/rnr_pcie_ehp/rnr_pcie_ehp_unpack/rtl

filenames:
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filenames: intel_vvp_snoop_scheduler.ocp/intel_vvp_snoop_scheduler.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/schedulers/intel_vvp_snoop_scheduler/src_hdl


filenames: alt_vip_tpg_rolling_bars_alg_core.ocp/alt_vip_tpg_rolling_bars_alg_core.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/processing/alt_vip_tpg_rolling_bars_alg_core/src_hdl


filenames: intel_vvp_axi4_stream_slave_bfm_hw.tcl/src_hdl
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/verification_library/axi4_stream_bfms/intel_vvp_axi4_stream_slave_bfm


filenames: rx/top/tx
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/40g/mentor/rtl/pfc


filetypes: ffffffffffffffffffffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_jesd204c/src/tx/synopsys

filenames:
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filenames: altera_nios2_gen2_rtl_module.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_nios2_gen2_rtl/intelfpga


filenames: aldec/alt_vip_fb_switch_scheduler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_fb_switch_scheduler


filenames: bch_enc_package.vhd/bch_encoder.vhd/bch_encoder_core.vhd
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_bch/mentor/bch_enc/src


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_mutex/LWHAL/src

filenames:
[cell repeats an earlier one in this file: 103 characters]


filetypes: fffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/mac/aldec/rx

filenames:
[cell repeats an earlier one in this file: 427 characters]


filenames: cadence/mentor/models/synopsys/xcelium
filetypes: ddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G/simulation/ed_sim


filenames: hslx
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/synopsys/rtl/alt_ehipc2_lib


filenames: intel_vvp_tpg_bars_algo_comp.sv/intel_vvp_tpg_bars_algo_comp_lut.sv
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filenames: rtile/sriov_apps
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filenames: basic.tcl
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filenames: src_hdl
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filenames: altera_merlin_axi_translator.sv.terp/altera_merlin_axi_translator_hw.tcl/axi_interface.tcl
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filenames: alt_pma_controller_tgx.v
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filenames: alt_vip_pip_sop_realign.sv
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filenames: pkt_client.tcl
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filenames: alt_e50_adapter.v/alt_e50_wide_l2if_rx_mux.v/alt_e50_wide_l2if_tx.v
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filenames: alt_aeu_40/optical_module/pkt_client/sval_top
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filenames: altpcietb_bfm_driver.v
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filetypes: fff
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filenames: rtl/rtl_IpRev_1p1p0/tcl
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filenames: ltssm_monitor.sv/ptile_debug_toolkit.sv/ptile_link_inspector_top.sv
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filenames: altera_avalon_sysid.c/component.mk
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filenames: src_hdl
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filenames: intel_vvp_fr2cv.h/intel_vvp_fr2cv_regs.h
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filenames: intel_vvp_cpp_adapter.sv
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filetypes: ffffffff
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filenames:
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filenames: alt_vip_common_sop_align.sv
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filetypes: ffffffff
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filenames:
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filetypes: fffffffffffff
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filenames:
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filenames: quartus/rtl/script/software
filetypes: dddd
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filenames: intel_vvp_clipper.h/intel_vvp_clipper_regs.h
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filenames: rtl
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filenames: alt_dual_boot.v/alt_dual_boot_avmm.v
filetypes: ff
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filenames: intel_vvp_pip_conv_core.sv
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filenames: alt_mlab.v
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filetypes: fffffffffffffffffffffdd
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filetypes: ffffff
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filenames:
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filenames: intel_fpga_pcie_api_linux.cpp/intel_fpga_pcie_api_linux.hpp
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filenames: src_hdl
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filenames: aldec/c/cadence/intelfpga/matlab/mentor/rtl/spyglass/synopsys
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filenames:
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filenames: intel_vvp_mm_agent_reset_hold.sv
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filetypes: fffffffffffff
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filenames:
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filenames: altera_emr_unloader_hw.tcl
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dirname:
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filenames: alt_vip_common_onehot_to_binary.sv
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filenames: alt_vip_mixer_alpha_merge.sv
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filetypes: ffffffffffffff
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filenames:
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filenames: c3_reconfig.c/c3_reconfig.h/flow.c/main.c/nios_system_oc_mem2_0_onchip_memory2_0.hex
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filetypes: ffffffffffffffffffffffff
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filenames:
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filenames: intel_vvp_axi_to_msg.sv
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filenames: alt_ehipc3_rx_deskew.sv/alt_ehipc3_tx_deskew.sv/alt_ehipc3_word_delay_mlab.sv
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filenames: intel_pcie_lite_bas.sv/intel_pcie_mcdma_bas.sv/intel_pcie_mcdma_bas_wrapper.v
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filetypes: fffffffffffffff
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filenames:
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filetypes: ffffff
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filenames:
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filenames: sdmmc_hw.tcl
filetypes: f
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filetypes: ffffffffffff
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filenames:
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filetypes: fff
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filenames:
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filetypes: ffffffffffff
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filenames:
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filenames: harq/ldpcCd/ldpcCe/ldpcDec/ldpcDrm/ldpcEnc/ldpcRm/ldpcRxTop/ldpcTxTop/testbench
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filenames: src_hdl
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filenames: alt_e40_phy_pcs.v/common/rx/tx
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filetypes: ffffffffff
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filenames: aldec/cadence/intel_vvp_tmo_ram_hw.tcl/intelfpga/mentor/src_hdl/synopsys
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filenames: alt_vip_clipper_scheduler.sv
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filetypes: ffffffff
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filenames:
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filetypes: dffffffffffffffffffdddd
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filenames: intel_fwd_to_st_agent.v/intel_fwd_to_st_agent_hw.tcl
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filenames: auk_dspip_ctc_decoder_et_top.vhd/auk_dspip_ctc_et_ast_source.vhd/auk_dspip_memory_simple_dual.vhd
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filenames: altera_lvds_driver.sv
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filenames: make_qii_design.tcl/make_qsys.tcl/make_sim_design.tcl/phylite_niosii_bridge/readme.txt
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filenames: rtl
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filenames: msim_script.do.terp
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filenames: alt_xcvr_ilk_tx_aligner.sv/alt_xcvr_ilk_tx_aligner_hw.tcl/alt_xcvr_ilk_tx_aligner_top.v
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filetypes: ffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: fifo_inc.tcl/fifo_reg_map.tcl
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dirname:
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filetypes: fff
dirname:
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filenames:
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filenames: altera_avalon_monitor_and_gatherer_hw.tcl
filetypes: f
dirname:
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filenames: pll_crypto.tcl.terp/pll_hdmi.tcl.terp/pll_hdmi_reconfig.tcl.terp
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dirname:
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filenames: src_hdl
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dirname:
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filenames: Makefile.txt/README.txt/testapp.c/testapp.h/testapp_bas.c/testapp_stat.c/testapp_threads.c
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dirname:
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filenames: alt_vip_vfb_wr_ctrl.sv
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dirname:
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filetypes: ffffff
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: intel_vvp_3d_lut.c
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: fff
dirname:
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filenames:
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filenames: altera_xcvr_native_sv.sv/altera_xcvr_native_sv_functions_h.sv/misc
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dirname:
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filetypes: fffffffff
dirname:
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filenames:
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filetypes: ffffff
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filenames:
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filenames: aldec/alt_vip_cl_packet_dangler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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dirname:
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filetypes: ffffffffff
dirname:
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filenames:
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filetypes: fffffff
dirname:
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filenames:
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filenames: run_vsim.do
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dirname:
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filenames:
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filenames: altera_external_memory_bfm.sv/altera_external_memory_bfm_vhdl_wrapper.sv
filetypes: ff
dirname:
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filenames: rtl
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dirname:
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filetypes: fffffffffffffffffffffffffffff
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filenames:
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dirname:
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filenames:
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filetypes: ffffffffffffffffffffffff
dirname:
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filenames:
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filenames: rtl
filetypes: d
dirname:
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filenames: altera_eth_xgmii_ptp_inserter.v
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dirname:
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filenames: alt_vip_common_event_packet_encode.sv
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dirname:
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filenames: file_utils.tcl/ip_interfaces.tcl/ip_module.tcl/ip_module_12_1.tcl/messages.tcl
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dirname:
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filenames: alt_vip_common_frame_counter.v
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filenames: intel_vvp_input_interface_bridge.sv
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filenames: src_hdl
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filenames: hdmi_tx_reg_wrap.v/hdmi_tx_registers
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filenames: ctc_umts_enc_input_data.txt/ctc_umts_enc_input_info.txt/ctc_umts_enc_output_gold.txt
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filenames: intel_axi2cv_scheduler.sv
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filetypes: fffffffffffffffff
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filenames: alt_interlaken_8lane_6g_tb.sv/run_simulation.do
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filenames: bcm/marvell
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filenames: alt_vip_common_slave_interface.sv/alt_vip_common_slave_interface_mux.sv
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filenames: bch_enc_testbench.sv.terp/top_enc.vhd.terp
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filenames: alt_ehipc2_serial_pcomp.sv
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filenames:
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filenames: common/fm/s10
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filetypes: ffff
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filenames:
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filenames: alt_e40_adapter.v/alt_e40_wide_l2if_rx_mux.v/alt_e40_wide_l2if_tx.v
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filenames: common
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filenames: class.ptf/em_pipeline_bridge.pl/em_pipeline_bridge.pm
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filenames: inc/intel_vvp_cv2fr_sw.tcl/src
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filenames: cii_workaround/soft_logics/whr_adapters
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filenames: rnr_avmm_reconfig.sv/rnr_pipe_direct_rate_change_control.sv/rnr_rate_change_control.sv
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filenames:
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filenames: altera_eth_default_slave.v
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filenames:
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filetypes: fffff
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filenames:
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filenames: altera_eth_link_fault_detection.v
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dirname:
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filenames:
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filenames: src_hdl
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filetypes: ffff
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filenames:
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filenames: alt_vip_csc_scheduler.ocp/alt_vip_csc_scheduler.sv
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filenames: eth_ultra_mac_inc.tcl/eth_ultra_phy_inc.tcl/eth_ultra_stats_inc.tcl/main.tcl
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filenames: tb_run.sh/xcelium_wave.tcl
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filenames:
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filenames: fifo_ce_cfg.v/fifo_ce_dat.v/ldpc5g_crc_enc.sv/ldpc5g_crc_enc_top.sv
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filetypes: ffffffffffff
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filetypes: fdfffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: altera_generic_quad_spi_controller.c
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dirname:
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filenames: src_hdl
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filenames: altera_wufi_ufi_adapter.sv
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filetypes: fffffffffffff
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filenames:
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filetypes: ffffffff
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filenames:
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filenames: alt_aeu_40_status_sync.v/alt_aeu_40_sync_arst.v
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filetypes: ffffffffff
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filenames:
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filenames: altera_oct_common.tcl/pkgIndex.tcl
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filetypes: ffffffffffff
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filenames:
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filetypes: ffffff
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filenames:
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filenames: alt_e25s10_otn_tb.sv/run_otn_tb.sh
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filenames: altera_tb_run.sh/tb_run.sh/tb_top.ucli.txt/vcs_wave.tcl
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filenames: intel_fpga_i2c.c/intel_fpga_i2c.h
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filenames: ethmon.vhd/ethmon2.vhd/ethmon_32.vhd/top_ethmon32.vhd
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filenames: pll.sv
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filenames:
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filenames: alt_vip_control_slave.sv
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filenames: ldpcv5g_rx_top_tb.sv.terp/ldpcv5g_tx_top_tb.sv.terp/td_rx/td_tx
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dirname:
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filetypes: ffffff
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filenames:
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filetypes: fffffff
dirname:
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
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filenames: alt_e100_e_reco_caui4/alt_e100_e_reco_caui4.qip/alt_e100_e_reco_caui4.v
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dirname:
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filenames: assignments.tcl.terp
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dirname:
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filenames: alt_e2550_reset.v
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filetypes: fffffff
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filenames:
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filenames: memphy_utils.tcl
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dirname:
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filenames: inc/src
filetypes: dd
dirname:
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filenames: src_hdl
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dirname:
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filenames: gxb_tx.tcl.terp/gxb_tx_fpll.tcl.terp/gxb_tx_reset.tcl.terp/tx_phy_top.v.terp
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dirname:
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/100gbe/example/common/alt_e100_e_reco/alt_e100_e_reco

filenames:
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filetypes:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: dec/enc/lib/reference_designs/testbench
filetypes: ddddd
dirname:
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filenames: rtl
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dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_ehipc2_dcfifo_mlab.sv/alt_ehipc2_mlab.sv
filetypes: ff
dirname:
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filenames: intel_vvp_pip_conv_scheduler.sv
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dirname:
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filetypes: ffffff
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filenames:
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filenames: tb_top_wave_ed.do/tb_top_waveform.do/wave.tcl/wave_vcsmx_ed.do
filetypes: ffff
dirname:
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filetypes: dfddfddffdd
dirname:
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filenames:
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filetypes: fffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_vip_common_clock_crossing_bridge_grey.sv
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dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: rx/top/tx
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dirname:
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filetypes: fffff
dirname:
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filenames:
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filenames: altera_sl3_phy_adapter.sv/altera_sl3_phy_adapter_c3.sv
filetypes: ff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_e100_mac.v/common/csr/rx/tx
filetypes: fdddd
dirname:
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filenames: altera_xcvr_native_cv_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl
filetypes: fffff
dirname:
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filetypes: fffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_e40_adapter.v/alt_e40_wide_l2if_rx_mux.v/alt_e40_wide_l2if_tx.v
filetypes: fff
dirname:
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filetypes: fffffffffffffff
dirname:
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filenames:
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filenames: aldec/cadence/intel_vvp_vert_scaler_algo_comp_hw.tcl/intelfpga/mentor/src_hdl/synopsys
filetypes: ddfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_vert_scaler_algo_comp


filenames: intel_pcie_sw_rx_datapath.sv/intel_pcie_sw_tx_datapath.sv
filetypes: ff
dirname:
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filenames: intel_vvp_vfb.h/intel_vvp_vfb_regs.h
filetypes: ff
dirname:
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filetypes: ffffffffffffffffffffffffff
dirname:
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filenames:
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filetypes: dfffffffffffffffffffffffffffffffffffddd
dirname:
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filenames:
  common/dp2p0_txll_avmm_ibuf.v/dp2p0_txll_blank_st_mux.v/dp2p0_txll_link_layer.v/dp2p0_txll_link_layer_add_registers.v/dp2p0_txll_ll_registers.v/dp2p0_txll_ll_st_decim.v/dp2p0_txll_llcp_mux.v/dp2p0_txll_msa_packer.v/dp2p0_txll_mst_registers.v/dp2p0_txll_mtp_mux.v/dp2p0_txll_mtp_mux_controller_1spc.v/dp2p0_txll_mtp_mux_controller_2spc.v/dp2p0_txll_mtp_mux_symbol_aligner_2spc.v/dp2p0_txll_mtp_mux_wt_1spc.v/dp2p0_txll_mtp_mux_wt_2spc.v/dp2p0_txll_payload_mux.v/dp2p0_txll_payload_update_controller.v/dp2p0_txll_phy_sync_overhead_mux.v/dp2p0_txll_sdp_crc.v/dp2p0_txll_sdp_encoder.v/dp2p0_txll_sdp_encoder_1spc.v/dp2p0_txll_sdp_encoder_2spc.v/dp2p0_txll_sdp_ext_st_id_inserter.v/dp2p0_txll_sdp_mux.v/dp2p0_txll_st_ctrl_registers.v/dp2p0_txll_stream_source.v/dp2p0_txll_vb_id_packer.v/dp2p0_txll_vc_htotal_calc.v/dp2p0_txll_vc_payload_mapper_layer.v/dp2p0_txll_vc_st_mux.v/dp2p0_txll_vc_st_mux_ctrl.v/dp2p0_txll_vc_timing_generator.v/dp2p0_txll_vc_vd_gate.v/dp2p0_txll_vd_be_inserter.v/dp2p0_txll_vd_stuff_symbol_inserter.v/ss/vs/vsc


filenames: altera_merlin_arbitrator.sv/altera_merlin_multiplexer.sv.terp/altera_merlin_multiplexer_hw.tcl
filetypes: fff
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffdffdffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_ehipc3_gf_clock_mux.v/alt_ehipc3_kr.sv/alt_ehipc3_resync_nocut.sv/alt_ehipc3_wait_generate.v
filetypes: ffff
dirname:
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filetypes: fffffff
dirname:
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filenames:
  sdi_ii_rx_phy_mgmt.v/sdi_ii_rx_rate_detect.v/sdi_ii_rx_sample.v/sdi_ii_rx_vid_std_detect.v/sdi_ii_rx_xcvr_ctrl_direct.v/sdi_ii_rx_xcvr_ctrl_native.v/sdi_ii_rx_xcvr_interface.v


filenames: intel_pcie_pipestage.sv
filetypes: f
dirname:
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filenames: altera_tristate_controller_aggregator.sv/altera_tristate_controller_aggregator_hw.tcl
filetypes: ff
dirname:
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filenames: intel_pcie_adapter_rx_if.sv/intel_pcie_adapter_stos.sv/intel_pcie_adapter_tx_if.sv
filetypes: fff
dirname:
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filenames: csr/efc/mac/pcs/top
filetypes: ddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e2550/50g/mentor/rtl


filenames: common/qsys
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_avmm/intelfpga/testbench/verilog


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_video_packet_encode/src_hdl

filenames:
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filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/verification/altera_avalon_interrupt_source/mentor

filenames:
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filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/hbm/ip_avl_ufi_adapter/synopsys/rtl

filenames:
[cell repeats an earlier one in this file: 111 characters]


filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffddfff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_av_hip_ast

filenames:
  altera_pcie_av_hip_ast_hw.tcl/altera_pcie_av_hip_ast_wizard.lst/altpcie_av_hip_128bit_atom.v/altpcie_av_hip_ast_hwtcl.v/intelfpga/mentor/pcie_av_parameters.tcl/pcie_av_parameters_common.tcl/pcie_av_port.tcl


filenames: basic.tcl/reset.tcl/status.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/example_project/hwtest/40g


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/hw_demo/arria_10/rtl/reconfig_mgmt

filenames:
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filenames: alt_ehipc2_clock_mon.sv/alt_ehipc2_jtag_avmm.sv/alt_ehipc2_package.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/cadence/rtl/top


filenames: altera_avalon_fifo_regs.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sopc_builder_ip/altera_avalon_fifo/inc


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/intelfpga/modules/alt_vip_common_sync


filenames: intel_axi2cv_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/tcl_components/schedulers/intel_axi2cv_scheduler/mentor/src_hdl


filenames: intel_vvp_kernel_select.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility/intel_vvp_kernel_select/synopsys/src_hdl


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_packet_mux/cadence


filenames: rx/top/tx
filetypes: ddd
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filenames: alt_vip_vfb_linebuf_ctrl.ocp/alt_vip_vfb_linebuf_ctrl.sv
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filenames:
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filenames:
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filenames: det_lat/efifo/ls_pcs
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filenames: aldec/cadence/intelfpga/mentor/rtl/synopsys
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filenames: alt_aeu_40_pfc_top.v
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dirname:
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filenames: altera_reset_synchronizer.v
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filenames: alt_e100_phy_pma_sv_caui4.v
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filenames: s10_rp_avmm_master_hwtcl.v
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filenames: ncsim_wave.svwf.txt/ncsim_wave.tcl/tb_run.sh
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filenames: hw/top
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filetypes: dddddffffffffff
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filenames: rtl
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filenames: intel_vvp_cvo_remap.sv
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filenames: intel_pcie_sw_rx_datapath.sv/intel_pcie_sw_tx_datapath.sv
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dirname:
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filetypes: fffff
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filenames: src_hdl
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filenames: altera_eth_pfc_pause_conversion.v
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filenames: altera_xcvr_reset_sequencer_s10
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filenames: alt_vip_common_message_pipeline_stage.sv
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filetypes: fffffffffffffffff
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filenames:
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filetypes: fffffffffff
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filenames:
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filetypes: dffffffffffffffddd
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filenames:
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filetypes: ffffffffffffffffffff
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filenames:
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filenames: src_hdl
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dirname:
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filetypes: fffffffff
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filenames:
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filenames: alt_vip_dil_algorithm.sv
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filenames: src_hdl
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: fffffff
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filenames:
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filenames: alt_e50s10_fc_top.v/alt_e50s10_rx_fc.v/alt_e50s10_tx_fc.v/alt_e50s10_tx_fc_frame_muxer.v
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filenames:
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filenames: gdr_hssi_hw_common_util.tcl/gdr_hssi_hw_parameters.tcl/gdr_hssi_hw_rbc.tcl
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filetypes: ffddfff
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filenames:
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filetypes: fffff
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filenames:
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filenames: phylite_addr_cmd.sv
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dirname:
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filenames: altera_remote_update.sv/altera_remote_update_core.sv
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filenames: rtile_sriov_ed_top.sv
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filetypes: fffff
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filenames:
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filenames: intel_vvp_csc_algo_comp.sv
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filenames: avmmReady/baseLimitCmp/nstageCmp/pipestage
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filetypes: fffffffffff
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filenames:
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filetypes: fffff
dirname:
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filenames:
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filetypes: ffffffffffffffffffffff
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filenames:
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filetypes: ffffffffffff
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filenames:
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filenames: alt_vip_common_mult_add_nodsp.sv
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dirname:
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filenames: address_decoder_multi_channel_channel_10.v/altera_merlin_slave_translator_mch10.sv
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dirname:
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filetypes: dfffffffffffddd
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filenames:
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filenames: intel_axi2cv_core/intel_cv2axi_core/schedulers
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filenames: altera_emif_ddrt_model.sv/altera_emif_ddrt_model_base.sv/altera_emif_simbus.sv
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dirname:
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filetypes: fffffffffff
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filenames:
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filenames: intel_vvp_axi_master_stub.sv
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filenames: aldec/alt_vip_interlacer_scheduler_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filetypes: ffffffffffffffff
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filetypes: fffffffffffffffffffff
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filenames: alt_hiconnect_st_reg.sv/alt_hiconnect_st_reg_hw.tcl
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filenames: alt_vip_vert_scaler_alg_core.sv
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filetypes: fffffffffffffff
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filetypes: ddd
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filenames:
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filenames: altera_xcvr_10gbase_kr_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl
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filenames: tx_control_src
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filenames:
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filenames: altpcie_a10_hip_ast_translator.sv/altpcie_ast_translator.sv
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filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
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filetypes: ffff
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filetypes: ffffffffffffffffffffffffffffffff
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filenames:
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filenames: alt_ehipc2_mac_enable_avmm.sv/alt_ehipc2_sl_pause.sv/alt_ehipc2_sm_recover.sv
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filenames: rx/top/tx
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filenames: src_hdl
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filetypes: ffffffffffff
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filenames:
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filenames: altera_eth_10gkr_phy_a10.qsys
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filetypes: ffffffffffffffffffff
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filenames:
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filenames:
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filenames: dec/enc
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dirname:
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filenames: src_hdl
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filenames: intel_vab_axi_master.sv/intel_vab_axi_pipeline_stage.sv
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filetypes: ffffffffffffffffff
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filenames:
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filenames: top_hw.v
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dirname:
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filenames: alt_ehipc2_alias_csr.sv/alt_ehipc2_avmm_32to8.sv/alt_ehipc2_csr.v
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filetypes: ffffffffffffffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: ddffffffdddffdfffdf
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filenames:
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filenames: vi_functions.vhd/vi_interface.vhd
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dirname:
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filetypes: fffffffdff
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filenames:
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filetypes: fffffffffffffff
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filenames:
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filetypes: fffffffffff
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filenames:
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filenames: common
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dirname:
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filetypes: fffffff
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filenames:
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filenames: intel_pcie_cmp_stg123.sv
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dirname:
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filenames: Licenses/dpdk/version.txt
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dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffd
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filenames:
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filenames: csr
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dirname:
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filenames: core
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dirname:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: alt_aeu_40/optical_module/pkt_client/sval_top
filetypes: dddd
dirname:
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filenames: bitswap_qsys.v/bitswap_qsys_hw.tcl
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filetypes: ffffffffffffffff
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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filenames:
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filenames: rtl
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filetypes: fffffffff
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filenames:
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filenames: alt_vip_scaler_scheduler.ocp/alt_vip_scaler_scheduler.sv
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filenames: common/hwtest/templates
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dirname:
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filenames: intel_vvp_pkt_duplicator.sv
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filenames: src_hdl
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filenames: altera_lvds_common14.sv
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dirname:
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filenames: alt_xcvr_if_terminator_hw.tcl/alt_xcvr_if_terminator_top.v
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filenames: alt_e40_sys_pll_siv.qip/alt_e40_sys_pll_siv.v
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filenames: altera_avalon_jtag_uart_lwhal_putchar.c
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dirname:
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filenames: alt_vip_common_fifo.v
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dirname:
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filenames: alt_vip_video_output_bridge.sv
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dirname:
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filetypes: ffffffffffffffff
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filenames:
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filetypes: fffffffffffff
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filenames:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: make_qii_design.tcl/make_qsys.tcl/make_sim_design.tcl/readme.txt
filetypes: ffff
dirname:
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
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filetypes: ffff
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filenames:
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filenames: altera/common/main.tcl/readme.txt
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filenames: src_hdl
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filetypes: fffffffffffffff
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filenames:
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filenames: intel_pcie_ReadyDelay.sv
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dirname:
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filenames: s5mlab.v
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dirname:
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filenames: altera_ldpc_dec_hw.tcl
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dirname:
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: fffffdfdd
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filenames:
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filenames: intel_vvp_crs.c
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dirname:
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filetypes: ffff
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filenames:
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filenames: alt_e50s10_kr_rcfg_arb.sv/alt_e50s10_reco_arbiter.v/alt_e50s10_resync_nocut.sv
filetypes: fff
dirname:
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filetypes: fffffffff
dirname:
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filenames:
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filetypes: ffff
dirname:
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filenames:
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filenames: src_hdl
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dirname:
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filenames: altera_ldpc_nasa_enc.sv/altera_ldpc_nasa_enc_mat.sv
filetypes: ff
dirname:
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filenames: address_decoder_multi_channel_channel_11.v/altera_merlin_slave_translator_mch11.sv
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: fffff
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filenames:
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filenames: clkmgr_hw.tcl
filetypes: f
dirname:
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filenames: alt_vip_control_slave.sv
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dirname:
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filenames: src_hdl
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dirname:
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filenames: src_hdl
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filenames: 40g/altera/common/main.tcl/reg_test.tcl
filetypes: dddff
dirname:
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filenames: src_hdl
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filenames: altera_eth_link_fault_generation.v
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dirname:
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filetypes: fff
dirname:
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filenames:
  intel_vvp_vert_scaler_algo_comp.sv/intel_vvp_vert_scaler_algo_comp_bl.sv/intel_vvp_vert_scaler_algo_comp_coeff.sv


filenames: altera_up_avalon_video_edge_detection_hw.tcl/hdl
filetypes: fd
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: altera_generic_quad_spi_controller_regs.h
filetypes: f
dirname:
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filenames: fp_add_a10.vhd/fp_add_s10.vhd/fp_mult_a10.vhd/fp_mult_s10.vhd
filetypes: ffff
dirname:
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filenames: common/hwtest/ptp/templates/testbench
filetypes: ddddd
dirname:
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filenames: altera_xcvr_cdr_pll_a10.sv
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_e40_e_reco_base.v
filetypes: f
dirname:
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filenames: alt_vip_warp_ac.sv/alt_vip_warp_bilinear_ac.sv
filetypes: ff
dirname:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: alt_vip_packet_demux.sv
filetypes: f
dirname:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: intel_vvp_3d_lut_core
filetypes: d
dirname:
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filenames: altera_rs_ser_transaction_format_adapter.sv
filetypes: f
dirname:
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filenames: intel_vvp_axi_to_msg.sv
filetypes: f
dirname:
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filenames: intel_pcie_schd_order.sv/intel_pcie_schd_piped_empty_calc.sv/intel_pcie_schd_scfifo.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/avmm_bridge_512/schd/common


filenames: alt_ehipc3_mac_enable_avmm.sv/alt_ehipc3_sl_pause.sv/alt_ehipc3_sm_recover.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc3/rtl/pausew


filetypes: dffdddd
dirname:
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filenames:
  aldec/altera_eth_tse_ftile_phyip_terminator.v/altera_eth_tse_ftile_phyip_terminator_hw.tcl/cadence/intelfpga/mentor/synopsys


filetypes: ffff
dirname:
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filenames:
  intel_pcie_bam_avmm_intf_pipeline.sv/intel_pcie_bam_cpl_pipeline.sv/intel_pcie_bam_pipeline.sv/intel_pcie_bam_sch_intf_pipeline.sv


filenames: alt_vip_dil_vof_scheduler.sv
filetypes: f
dirname:
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filetypes: fffffff
dirname:
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filenames:
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filenames: altera_eth_gmii_tsu.v
filetypes: f
dirname:
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filetypes: fffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: bitec_hdmi_tx_audio.v/bitec_hdmi_tx_audio_mux.v
filetypes: ff
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_e2550_reset.v
filetypes: f
dirname:
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filetypes: fffff
dirname:
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filenames:
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filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_ehipc2/synopsys/rtl/rst_ctrl

filenames:
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filetypes: dffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_pcie/altera_pcie_s10_hip_ast/mentor

filenames:
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filenames: aldec/cadence/intel_vvp_round_sat_algo_comp_hw.tcl/intelfpga/mentor/src_hdl/synopsys
filetypes: ddfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_round_sat_algo_comp


filenames: aldec/cadence/intel_vvp_msg_to_axi_hw.tcl/intelfpga/mentor/src_hdl/synopsys
filetypes: ddfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/legacy/intel_vvp_msg_to_axi


filetypes: dddddddddddddddddddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/utility

filenames:
  intel_vvp_axi_master_stub/intel_vvp_axi_slave_stub/intel_vvp_axi_st_pipe_bridge/intel_vvp_cpp_adapter/intel_vvp_fifo_core/intel_vvp_input_interface_bridge/intel_vvp_kernel_select/intel_vvp_line_buffer/intel_vvp_mm_agent_reset_hold/intel_vvp_output_interface_bridge/intel_vvp_packet_discard/intel_vvp_packet_reader/intel_vvp_packet_writer/intel_vvp_pip_conv_core/intel_vvp_pkt_clip/intel_vvp_pkt_demux/intel_vvp_pkt_duplicator/intel_vvp_pkt_mux/intel_vvp_reset_sync/intel_vvp_ro_reg_servicer/intel_vvp_scaler_coeff_handler/intel_vvp_slave_data_split/intel_vvp_slave_front_end/intel_vvp_snoop_core


filenames: alt_e40_lut6.v/alt_e40_mlab.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_e40c3/hslx/s10/aldec


filenames: alt_vip_common_delay.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/common_hdl/intelfpga/modules/alt_vip_common_delay/src_hdl


filenames: src_hdl
filetypes: d
dirname:
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filenames: intel_vvp_fr2cv_hw.tcl/sw
filetypes: fd
dirname:
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filetypes: ffff
dirname:
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filenames:
  intel_vvp_crs_h_down_algo_comp.sv/intel_vvp_crs_h_down_algo_comp_bl.sv/intel_vvp_crs_h_down_algo_comp_ft.sv/intel_vvp_crs_h_down_algo_comp_nn.sv


filenames: alt_vip_warp_line_store.sv
filetypes: f
dirname:
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filenames: viterbi_testbench.sv.terp
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_vit_ii/src/testbench


filenames: emif_cal_dbg/emif_effmon/emif_tg_cfg
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/emif/system_console_toolkits


filenames: altera_eth_statistics_collector.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_statistics_collector/intelfpga


filetypes: ddfff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/pgm/intel_generic_serial_flash_interface/intel_generic_serial_flash_interface_top

filenames:
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filenames: intel_vvp_axi_master_stub.sv
filetypes: f
dirname:
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filenames: common
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dynamic_reconfiguration/dr_f/mentor/example_project


filenames: altera_avalon_st_tee_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/sld/st/altera_avalon_st_tee


filenames: alt_vip_common_mult_add_nodsp.sv
filetypes: f
dirname:
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filenames: tb_run.sh/tb_top.ucli.txt/vcs_wave.tcl
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G/simulation/ed_sim/synopsys/vcs


filenames: aldec/alt_vip_pip_converter_core_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
filetypes: dfddddd
dirname:
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filenames: dw_apb_timer_sp_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/hps/hard_peripheral_logical_view/dw_apb_timer_sp


filenames: altera_eth_gmii_ptp_inserter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/ethernet_ucore/altera_eth_gmii_ptp_inserter/cadence


filenames: altera_pcie_s10_rxm.sv
filetypes: f
dirname:
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filenames: altera_eth_tse_bridge.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/tse_ucores/altera_eth_tse_bridge/aldec


filenames: bchp_search.vhd/bchp_shift_search.vhd/bchp_shift_searches.vhd
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_bch/aldec/bch_dec/src/bchp_search


filenames: avalon_st_loopback_inc.tcl/avalon_st_loopback_reg_map.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G/hwtesting/system_console/traffic_controller/avalonstloopback


filenames: src_hdl
filetypes: d
dirname:
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filenames: auk_dspip_crc24ab.vhd/crc_pkg.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/dsp/altera_turbo/LTE/src/rtl/crc


filenames: intel_pcie_schd_order.sv/intel_pcie_schd_piped_empty_calc.sv/intel_pcie_schd_scfifo.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/intel_pcie/avmm_bridge_512/mentor/schd/common


filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hmcc/common/intelfpga

filenames:
  altera_hmcc_a10mlab.v/altera_hmcc_and_r.sv/altera_hmcc_dcore.sv/altera_hmcc_delay_mlab.v/altera_hmcc_delay_regs_ena.v/altera_hmcc_descrambler.sv/altera_hmcc_destriper.sv/altera_hmcc_eq_5_ena.v/altera_hmcc_error.sv/altera_hmcc_extractor.sv/altera_hmcc_flow_packets.sv/altera_hmcc_init_sm.sv/altera_hmcc_irtry.sv/altera_hmcc_lane_aligner.sv/altera_hmcc_lane_swapper.sv/altera_hmcc_mx5r.v/altera_hmcc_neq_5_ena.v/altera_hmcc_null_detector.sv/altera_hmcc_or_r.sv/altera_hmcc_registers.sv/altera_hmcc_retry_pointer.sv/altera_hmcc_retry_sm.sv/altera_hmcc_rrp_pret.sv/altera_hmcc_rrp_register.sv/altera_hmcc_s5mlab.v/altera_hmcc_scfifo_block_ram.sv/altera_hmcc_scfifo_ecc.sv/altera_hmcc_scfifo_mlab.v/altera_hmcc_scrambler.sv/altera_hmcc_striper.sv/altera_hmcc_sync_regs_aclr.v/altera_hmcc_token_counter.sv/altera_hmcc_tx_crc32k_evo64_x10.sv/altera_hmcc_tx_crc32k_evo64_x12.sv/altera_hmcc_tx_crc32k_evo64_x2.sv/altera_hmcc_tx_crc32k_evo64_x4.sv/altera_hmcc_tx_crc32k_evo64_x6.sv/altera_hmcc_tx_crc32k_evo64_x8.sv/altera_hmcc_tx_crc32k_sig128_evo64_x1.sv/altera_hmcc_tx_crc32k_sig128_evo64_x3.sv/altera_hmcc_tx_crc32k_sig128_evo64_x5.sv/altera_hmcc_tx_crc32k_sig128_evo64_x7.sv/altera_hmcc_tx_crc32k_sig64_evo64_x1_head.sv/altera_hmcc_tx_crc32k_sig64_evo64_x3_head.sv/altera_hmcc_tx_crc32k_sig64_evo64_x5_head.sv/altera_hmcc_tx_crc32k_sig64_evo64_x9_head.sv/altera_hmcc_tx_crc32k_sig64_rrp.sv/altera_hmcc_tx_crc32k_sig64_tail.sv/altera_hmcc_word_aligner.sv/altera_hmcc_wys_lut.sv/altera_hmcc_wys_lut_inc.iv


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vip/ip_library/component_ip/utility/alt_vip_vfb_wr_ctrl/mentor


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/phy/aldec/pcs/tx

filenames:
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filenames: intel_vab_axi_master.sv/intel_vab_axi_pipeline_stage.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/video_axi_bridges/component_library/hdl_modules/pipeline/aldec


filenames: intel_vvp_cv2fr_core/intel_vvp_fr2cv_core/intel_vvp_fr2lite_core
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/cvg


filenames: altera_nd_mailbox_avst_adap.sv/altera_nd_mailbox_avst_adap_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/pgm/altera_nd_mailbox_multiplexer/altera_nd_mailbox_avst_adap


filenames: intel_hdmi_rx_core_phy_intf.v/intel_hdmi_rx_oversample.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/src/phy_intf/rx/intelfpga


filetypes: dfffffdddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/ethernet/alt_eth_ultra/40g_kr4_a10

filenames:
  aldec/alt_aeu_40_arbiter.v/alt_aeu_40_gearbox_66_40.v/alt_aeu_40_pma_a10_kr4.v/alt_aeu_40_seq_reco_n.ocp/alt_aeu_40_seq_reco_n.v/cadence/common_src/cpu/intelfpga/mentor/reconfig/synopsys/variants


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/vvp/component_library/tcl_components/algorithmic_components/intel_vvp_clipper_algo_comp/mentor/src_hdl

filenames:
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filenames: class.ptf
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filetypes: dffffffffffd
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filetypes: fffffff
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filenames: LDPC5GEncoder.m/LdpcEncoder_mexWrap.c/make.m
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filenames: common/rx/tx
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filenames: altera_hsrs_testbench.tcl/altera_hsrs_utilities.tcl/avalon_streaming_util.tcl
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filenames: alt_e40_block_distributor.v/alt_e40_pcs.v/alt_e40_pcs_rx.v/alt_e40_pcs_tx.v
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filenames: intel_vvp_cvo_remap.sv
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filenames: aldec/alt_vip_chroma_key_alg_core_hw.tcl/cadence/intelfpga/mentor/src_hdl/synopsys
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filenames: intel_vvp_message_to_vvp_conv.sv
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filenames: edid_ram.tcl.terp/hdmi_rx_top.v.terp
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filenames: src_hdl
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filenames: src_hdl
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filenames: common/rx/tx
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filetypes: ffff
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filenames:
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filetypes: ffffffffffffffffffffff
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filenames:
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filenames: alt_vip_common_rotate_mux.sv
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filetypes: ffffffffff
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filenames:
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filenames: chaining_dma/root_port
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filenames: altgxb_reconfig.v/gpll.v/s4gx_gen1x8_qsys_top.v
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filetypes: ffffffff
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filenames:
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filenames: altpcie_pcie_reconfig_bridge.v/altpcie_pll_100_250.v/altpcie_pll_125_250.v/altpcie_rs_serdes.v
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filenames: bitec_hdmi_tx_audio.v/bitec_hdmi_tx_audio_mux.v
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filenames: wirelist.net
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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filetypes: fff
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filenames:
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filetypes: ffff
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filenames: ncsim_wave.tcl/tb_run.sh
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filetypes: ffffffffffffffffffffffff
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filenames:
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filenames: alt_e100_pma_sv_bridge.v
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filenames: btc_cpu.h/btc_dp_mst.h/btc_dptxll_globals.h/btc_dptxll_syslib.h/public.mk/release
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filenames: altera_eth_tse_pcs_2xtbi.v
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dirname:
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filenames: altera_eth_tse_avalon_arbiter.v
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filetypes: ffffffffffffffffffff
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filetypes: dfffdddd
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filenames: altera_eth_10g_rx_register_map.v
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filenames: alt_e100_phy_pma_sv.v
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dirname:
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filenames: alt_e40_rx_e4x10_base.v
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dirname:
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filenames: src_hdl
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filenames: alt_e40_rx_top_siv.qpf/alt_e40_rx_top_siv.qsf/alt_e40_rx_top_siv.v
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filenames: designware_i2c_hw.tcl
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dirname:
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filenames: src_hdl
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dirname:
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filetypes: fffff
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filenames:
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filenames: src_hdl
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filenames: hps_clk_src_hw.tcl
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dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: v20.05-rc1
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dirname:
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filenames: main.tcl/reg_map_inc.tcl
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dirname:
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filetypes: dfdffff
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filenames:
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filenames:
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filenames: alt_ehipc2_dcfifo_mlab.sv/alt_ehipc2_mlab.sv
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dirname:
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filenames: quartus/rtl
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dirname:
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filenames: intel_vvp_common_simple_dpram.sv
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dirname:
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filetypes: ffff
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filenames:
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filetypes: ffffff
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filenames:
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filenames: intel_pcie_bas.sv/intel_pcie_lite_bas.sv
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filetypes: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffd
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filenames:
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filetypes: ffff
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filenames:
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filenames: altera_ldpc_pkg.sv
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dirname:
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filenames: src_hdl
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filenames: altera_up_avalon_video_rgb_resampler.h
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dirname:
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filenames: alt_hiconnect_axi_slv_agent.sv/alt_hiconnect_axi_slv_agent_hw.tcl
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dirname:
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dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2022.2.0/QuartusPrimePro/21.4/ip/altera/altera_hdmi/hw_demo/s10_frl_demo/rtl/reconfig/mr_rxphy/mif

filenames:
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filetypes:
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filetypes: fffffffffffffffff
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filenames:
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filenames: cfp_control_inc.tcl/main.tcl/qsfp_control_inc.tcl
filetypes: fff
dirname:
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filenames: alt_vip_dil_sobel_scheduler.sv
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