# filelist

filenames: alt_usxgmii_mac_s10.ip.terp
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII_1588v2/rtl/mac


filetypes: ffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G/rtl/address_decoder/ip_s10/alt_mge_rd_addrdec_mch

filenames:
[cell repeats an earlier one in this file: 502 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g/mentor/rtl/ast

filenames:
[cell repeats an earlier one in this file: 229 characters]


filenames: altera_avalon_altpll_reconfig_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/sopc_builder_ip/altera_avalon_altpll_reconfig


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_mem_if/ed_comps/board_delay_models/altera_rldram3_board_delay_model

filenames:
[cell repeats an earlier one in this file: 209 characters]


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e25s10/25g/rtl/mac

filenames:
[cell repeats an earlier one in this file: 248 characters]


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g/cadence/rtl/ptp

filenames:
[cell repeats an earlier one in this file: 294 characters]


filetypes: fffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e25s10/25g_rsfec/cadence

filenames:
[cell repeats an earlier one in this file: 703 characters]


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/altera_turbo/LTE/synopsys/src/rtl/output

filenames:
[cell repeats an earlier one in this file: 231 characters]


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e100s10/hsls10/mentor

filenames:
[cell repeats an earlier one in this file: 3969 characters]

filetypes:
[cell repeats an earlier one in this file: 167 characters]


filenames: altera_remote_update.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_remote_update/HAL/inc


filenames: alt_vip_seq_par_convert.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_seq_par_convert/aldec/src_hdl


filetypes: ffffdfff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_av_hip_ast

filenames:
[cell repeats an earlier one in this file: 196 characters]


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_a10_tbed/synopsys/verilog

filenames:
[cell repeats an earlier one in this file: 127 characters]


filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/merlin/altera_tristate_conduit_pin_sharer_core

filenames:
[cell repeats an earlier one in this file: 112 characters]


dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/toolkits/s10
filetypes: ffffffffdf
filenames:
  alt_e100s10_toolkit.tcl/alt_e40_toolkit.tcl/alt_e40c3_toolkit.tcl/alt_e40emu_toolkit.tcl/alt_ehipc2_toolkit.tcl/alt_ehipc3_fm_toolkit.tcl/alt_ehipc3_toolkit.tcl/altera_xcvr_10gbase_kr_toolkit.tcl/packages/update_files.sh


filetypes: ffdfffddfdffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_dp/de_gen/stratix_10/simulation

filenames:
[cell repeats an earlier one in this file: 251 characters]


filenames: assignments.tcl.terp
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_dp/de_gen/cyclone_10/quartus


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/intel_fpga_ldpc_5g/src/enc/mentor/rtl/core

filenames:
[cell repeats an earlier one in this file: 103 characters]


filenames: altera_sld_hub_controller_system_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/sld/core/altera_sld_hub_controller_system


filenames: altera_eth_statistics_collector.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/ethernet_ucore/altera_eth_statistics_collector/synopsys


filenames: altera_eth_avalon_mm_adapter.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/MAC/aldec/adapters/altera_eth_avalon_mm_adapter


filenames: example_project/example_testbench/rtl
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc2/synopsys


filenames: alt_usxgmii_phy_s10.ip
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10G_USXGMII_1588v2/rtl/phy


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/altera_rapidio2_native_phy_ip/native_phy_stratixv/native_phy_4x


filenames: alt_vip_vfb_wr_ctrl.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_vfb_wr_ctrl/cadence/src_hdl


filenames: chaining_dma
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_ed/aldec/example_design/verilog


filenames: alt_vip_video_input_bridge_cmd.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_video_input_bridge_cmd/cadence/src_hdl


filenames: altera_eth_10g_mac_a10.qsys.terp
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/rtl/mac


filenames: altera_mem_if_ddr2_pll_hw.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_mem_if/altera_mem_if_pll/altera_mem_if_ddr2_pll


filetypes: ffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/altera_pcie_s10_dma_controller

filenames:
[cell repeats an earlier one in this file: 349 characters]


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/cadence/altera_rapidio2_native_phy_ip/native_phy_arriav/native_phy_1x


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/intel_fpga_ldpcv_5g/src/matlab

filenames:
  ldpc5g_rx_chain.m/ldpc5g_rx_chain_mexWrap.cpp/ldpc5g_tx_chain.m/ldpc5g_tx_chain_mexWrap.c/ldpc5g_txrx_chain_test.m/make.m


filenames: altera_reset_controller.v/altera_reset_synchronizer.v
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/merlin/altera_reset_controller/cadence


filenames: src
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/altera_bch/mentor/bch_dec


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/cpriphy/alt_cpriphy_c3/example_project/common

filenames:
[cell repeats an earlier one in this file: 282 characters]


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/hbm/ip_axi_ufi_adapter/aldec/rtl

filenames:
[cell repeats an earlier one in this file: 176 characters]


filetypes: dffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/ethernet_ucore/altera_eth_avst2gmii_converter

filenames:
[cell repeats an earlier one in this file: 100 characters]


filenames: aldec/alt_vip_dil_bob_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_dil_bob_scheduler


filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/altera_ldpc/src/ldpc_ucores/dec/altera_ldpc_nasa_msa/aldec

filenames:
[cell repeats an earlier one in this file: 169 characters]


dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e40emu/hwtcl
filetypes: ffffffffffff
filenames:
  alt_e40emu_hw.tcl/fileset.tcl/interfaces.tcl/module.tcl/parameters.tcl/pkgIndex.tcl/qsf_tools.tcl/rtl_tools.tcl/sdc_tools.tcl/srf_tools.tcl/tools.tcl/validation.tcl


filenames: altera_eth_10gkr_phy_a10.qsys
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_LINESIDE/rtl/phy


filenames: altpcietb_bfm_driver.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_avmm/mentor/testbench/verilog/qsys


filenames: reset_csr.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE/rtl/reset_csr


filetypes: ddddddfffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_nios_custom_instr_floating_point_2/altera_nios_custom_instr_floating_point_2_multi

filenames:
[cell repeats an earlier one in this file: 193 characters]


filetypes: dfffddddddffd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_av_hip_avmm

filenames:
[cell repeats an earlier one in this file: 215 characters]


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/synopsys/altera_rapidio2_native_phy_ip/native_phy_arriav/native_phy_1x


filenames: altera_eth_pkt_backpressure_control.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/ethernet_ucore/altera_eth_pkt_backpressure_control/aldec


filenames: alt_e100_mac.v/common/csr/rx/tx
filetypes: fdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/100gbe/rtl_src/mac/synopsys


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/altera_cic_ii/mentor/src/rtl/avalon_streaming

filenames:
[cell repeats an earlier one in this file: 157 characters]


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/mac/rx

filenames:
[cell repeats an earlier one in this file: 364 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/audio_ip/clocked_audio_input/aldec


filenames: alt_vip_csc_alg_core.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/processing/alt_vip_csc_alg_core/mentor/src_hdl


filetypes: dfffffffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/ethernet_ucore/altera_eth_crc_pad_rem

filenames:
[cell repeats an earlier one in this file: 237 characters]


filenames: common
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc3_fm/aldec/example_project


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/cadence/altera_rapidio2_native_phy_ip/native_phy_cyclonev/native_phy_4x


filenames: alt_vip_common_shift_mux.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_shift_mux/src_hdl


filetypes: dfdfddfddddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_hip_avmm_bridge/mentor

filenames:
[cell repeats an earlier one in this file: 370 characters]


filenames: system_console
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G/hwtesting


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_interlaken_hp/ilk_50g_regroup/synopsys

filenames:
[cell repeats an earlier one in this file: 469 characters]


filetypes: dfffddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/rs_ii/src/rs_ucores/dec/altera_rs_ser_transaction_converter

filenames:
[cell repeats an earlier one in this file: 151 characters]


filenames: aldec/alt_vip_cpp_converter_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/utility/alt_vip_cpp_converter


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/aldec/altera_rapidio2_native_phy_ip/native_phy_cyclonev/native_phy_2x


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/mentor/modules/alt_vip_common_scaler_edge_detect


filenames: alt_e40_tx_e4x10_base.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_eth_40g_100g/40gbe/rtl_src/phy/pma_siv/alt_e40_tx_e4x10


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_jesd204/src/tx/s10/aldec

filenames:
[cell repeats an earlier one in this file: 184 characters]


filetypes: fffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/100g_del_calc/synopsys

filenames:
[cell repeats an earlier one in this file: 150 characters]


filenames: src_hdl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_event_packet_decode


filetypes: fffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_xcvr/altera_xcvr_native_phy/altera_xcvr_native_s20_common_design_example_rules/cm_common_rules/parameter_rules

filenames:
[cell repeats an earlier one in this file: 548 characters]


filenames: alt_vip_common_latency_1_to_latency_0.sv/alt_vip_common_video_packet_decode.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/synopsys/modules/alt_vip_common_video_packet_decode/src_hdl


filetypes: fffffffddffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC_CPRI/hardware_test_design

filenames:
  alt_cpriphy_c3_iopll_sclk_fm.ip/alt_cpriphy_c3_iopll_sclk_s10.ip/alt_ehipc3.sv.terp/alt_ehipc3_fm.sdc/alt_ehipc3_s10.sdc/ex_25G_fm.ip/ex_25G_s10.ip/ip_fm/ip_s10/nios_system_fm.qsys/nios_system_s10.qsys/probe_dl_fm.ip/probe_dl_s10.ip/reset_release_fm.ip/reset_release_s10.ip


filenames: altpcie_a10_hip_ast_translator.sv/altpcie_ast_translator.sv
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_a10_hip/mentor/a10_hip_ast_translator


filetypes: fffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/merlin/altera_reset_sequencer/aldec

filenames:
[cell repeats an earlier one in this file: 228 characters]


filenames: altera_up_avalon_audio_and_video_config.c
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/university_program/audio_video/altera_up_avalon_audio_and_video_config/HAL/src


filenames: altera_nios2_custom_instr_master_bfm_vhdl.vhd/altera_nios2_custom_instr_master_bfm_vhdl_pkg.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/sopc_builder_ip/verification/altera_nios2_custom_instr_master_bfm_vhdl


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_eth_ultra/40g_kr4_a10/cadence/common_src

filenames:
[cell repeats an earlier one in this file: 341 characters]


filetypes: ffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e40/40g_kr4_s10/reconfig

filenames:
[cell repeats an earlier one in this file: 241 characters]


filenames: dc_fifo_0.ip
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_10GBASER/rtl/fifo_dcfifo/ip_s10/dc_fifo


filenames: alt_aeu_40/kr4/optical_module/pkt_client/sval_top
filetypes: ddddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc3_fm/example_project/hwtest/altera


filenames: phylite_sim_ctrl.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_phylite/ip_sim_ctrl/mentor/rtl


filetypes: fffffffffffffff
dirname:
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filenames: altera_eth_lane_decoder.v
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filetypes: ffffffffffffff
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filenames: altpciexpav_lite_app.v
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filenames: alt_aeu_40/kr4/optical_module/pkt_client/sval_top
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filenames: bitec_hdmi_tx_audio.v/bitec_hdmi_tx_audio_mux.v
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filenames: alt_vip_bps_converter.sv
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filenames: altera_pcie_s10_int_controller.v/altera_pcie_s10_reset_sync.v/altera_std_synchronizer_nocut.v
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filenames: common/hwtest/templates
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filenames:
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filenames: rx/tx
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filetypes: ffffffffffffffff
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filenames:
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filenames: altpcie_tbed_sv_hwtcl.v/verilog
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filenames: av_xcvr_custom_native.sv/av_xcvr_custom_nr.sv
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filenames:
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filenames: altera_rapidio2_dev16_io_slave.v/altera_rapidio2_dev8_io_slave.v
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filenames: altera_reset_controller.sdc/altera_reset_controller.v
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filenames:
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filenames: inc/src
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filenames: common_files
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filenames: altera_avalon_clock_reset_source.sv/altera_avalon_clock_reset_source_hw.tcl
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filetypes: ffffffffffff
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filenames: src_hdl
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filenames:
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filenames: alt_e100_phy_pcs.v/alt_e100_phy_pcs_caui4.v/common/rx/tx
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filetypes: fffffffffffffffff
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filenames: alt_vip_dil_low_angle_algorithm.sv/alt_vip_dil_pixel_offset_rom.v
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filenames: bch_dec_testbench.sv.terp/top_dec.vhd.terp
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filenames: alt_vip_common_sync_generation.v
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filenames:
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filenames: altera_eth_xgmii_crc.v/altera_eth_xgmii_crc32.v/altera_eth_xgmii_crc_gf_mult32_kc.v
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filenames: alt_xcvr_bit_slip.sv/alt_xcvr_bit_slip_hw.tcl/alt_xcvr_bit_slip_top.sv
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filenames: altr_uart_csr.v
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dirname:
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filenames:
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filenames: altera_mailbox_read_controller.sv/altera_mailbox_read_controller_hw.tcl
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dirname:
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filenames: altera_rapidio2_native_phy.v
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filenames: altera_tristate_conduit_bridge_translator.sv.terp/altera_tristate_conduit_bridge_translator_hw.tcl
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dirname:
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filenames: alt_vip_cpp_converter.sv
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filenames: altera_voltage_sensor_control.sv/voltage_sensor_avalon_control.sv/voltage_sensor_wrapper.sv
filetypes: fff
dirname:
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filenames: nios_system
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dirname:
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filenames: lib/matlab_model.template/matlab_tb.template
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dirname:
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filenames: source
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dirname:
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filenames: converter_qsys.v/converter_qsys_hw.tcl
filetypes: ff
dirname:
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filetypes: fffff
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filenames:
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filenames: pkgIndex.tcl/tcl
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dirname:
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filetypes: fffff
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filenames:
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filenames: src_hdl
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dirname:
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filetypes: ffff
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filenames:
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filenames: AVMM_clk.ip/AVMM_jtag.ip/AVMM_register_interface.ip
filetypes: fff
dirname:
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filenames: jtag_basic.tcl/main.tcl/report.tcl
filetypes: fff
dirname:
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filetypes: fffff
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filenames:
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filetypes: dddddddddddd
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filenames:
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filetypes: fffffffffffffffffffffffffffff
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filenames:
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filetypes: dfffffffddd
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filenames:
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filetypes: fff
dirname:
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filenames:
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filenames: alt_vip_common_sample_counter.v
filetypes: f
dirname:
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filetypes: fffff
dirname:
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filenames:
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filenames: cust
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dirname:
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filenames: alt_xcvr_if_terminator_hw.tcl/alt_xcvr_if_terminator_top.v
filetypes: ff
dirname:
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filenames: src
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dirname:
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filenames: src_hdl
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dirname:
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filenames: main.tcl/reg_map_inc.tcl
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dirname:
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filenames: altera_avalon_sc_fifo1.sv/altera_avalon_sc_fifo1_hw.tcl
filetypes: ff
dirname:
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filenames: src_hdl
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dirname:
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filenames: alt_vip_common_mult_add.sv
filetypes: f
dirname:
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filetypes: ffffffd
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filenames:
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filenames: altera_rapidio_io_master_x1.v/altera_rapidio_io_master_x2_x4.v
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dirname:
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filenames: altera_avalon_dma_256_hwtcl.v
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dirname:
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dirname:
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filenames: ast/csr/efc/mac/pcs/top
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filenames:
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filenames: aldec/alt_vip_clipper_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
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filetypes: fffffffffffffffff
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filenames: alt_vip_message_sink_terminator.sv
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filenames: alt_mem_if_nextgen_lpddr2_controller_core.sv
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dirname:
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filetypes: dfffffffffddd
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filenames: src_hdl
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filetypes: fffff
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filenames:
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filenames: intel_qdma_desc_fetch.sv/intel_qdma_fetch_sm.sv/intel_qdma_reg_acc.sv
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filenames: kernel/user
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filetypes: fff
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filenames: src_hdl
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filenames: altera_eth_pause_beat_conversion.v
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filenames: altera_rapidio2_native_phy.v
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filenames: altera_eth_gmii2avst_converter.v
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filenames: altera_eth_mdio.v
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filenames: altera_merlin_demultiplexer.sv.terp/altera_merlin_demultiplexer_hw.tcl
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filenames: altera_eth_10g_rx_register_map.v
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filenames: alt_vip_common_stream_output.sv
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filenames: intel_up_avalon_audio_clks.v
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filenames: src_hdl
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filetypes: ffff
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filenames: system_console
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filenames: alt_vip_motion_detect.sv
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filenames: src_hdl
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filenames: alt_mge_rd_addrdec_mch/alt_mge_rd_avmm_mux_xcvr_rcfg
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filenames: altera_rapidio2_native_phy.v
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filetypes: fffff
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filetypes: fffffffffffff
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filenames:
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filenames: altera_ldpc_pkg.sv
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filenames:
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filenames: altera_avalon_timer.h
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filenames: altera_mem_if_dll_bridge_hw.tcl
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filetypes: ffffffffffffffffffffffffffffff
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filenames:
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filenames: alt_e100_phy.v/csr/pcs/pma_a10/pma_siv/pma_sv/pma_sv_bridge/pma_sv_bridge_caui4/pma_sv_caui4
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filenames: address_decoder_channel/address_decoder_multi_channel/address_decoder_top
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filenames: altera_eth_tse_phyip_terminator.v
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filetypes: dddddddddddddddd
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filenames:
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filetypes: fffffffffffd
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filenames:
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filenames: altera_generic_quad_spi_controller_regs.h
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dirname:
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filenames: src_hdl
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filenames: adapter/common/kr4_sv/mac/phy/top
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filenames: src_hdl
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filenames: alt_e40_phy_pcs.ocp/alt_e40_phy_pcs.v/common/rx/tx
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/sld/jtag/intel_mce
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filenames: hps_bridge_avalon_hw.tcl
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filetypes: ffffffffffffffff
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filenames:
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filenames: alt_vip_common_sample_counter.v
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filenames: bitec_hdmi_tx_audio.v/bitec_hdmi_tx_audio_mux.v
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dirname:
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filenames: alt_vip_warp_line_store.sv
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filenames:
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filenames: eth_ultra_mac_inc.tcl/eth_ultra_phy_inc.tcl/eth_ultra_stats_inc.tcl/main.tcl
filetypes: ffff
dirname:
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dirname:
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filenames:
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filetypes:
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filenames: rom_bridge.v/sequencer_raminit.v
filetypes: ff
dirname:
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filenames: altera_up_avalon_ps2.c/altera_up_ps2_keyboard.c/altera_up_ps2_mouse.c
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dirname:
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filenames: alt_vip_crs_scheduler.ocp/alt_vip_crs_scheduler.sv
filetypes: ff
dirname:
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filenames: altera_rapidio_io_master_x1.v/altera_rapidio_io_master_x2_x4.v
filetypes: ff
dirname:
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filenames: altera_oct.sv/altera_oct_hw.tcl/altera_oct_um_fsm.sv/common_gui.properties/mentor/migration_map.csv
filetypes: ffffdf
dirname:
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filetypes: ffff
dirname:
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filenames:
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filenames: rtl
filetypes: d
dirname:
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filenames: altera_avalon_st_tee_hw.tcl
filetypes: f
dirname:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: assignments.tcl.terp
filetypes: f
dirname:
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filenames: src
filetypes: d
dirname:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: c10_hdmi2.sdc
filetypes: f
dirname:
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filenames: alt_vip_pip_sop_realign.sv
filetypes: f
dirname:
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filenames: altera_eth_xgmii_ptp_inserter.v
filetypes: f
dirname:
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filenames: aldec/cadence/mentor/rtl/synopsys
filetypes: ddddd
dirname:
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filetypes: ffffff
dirname:
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filenames:
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filetypes: ffffffffffffff
dirname:
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filenames:
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filenames: hwtest/rtl/simulation
filetypes: ddd
dirname:
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filenames: alt_cpriphy_c3_avmm_32to8.sv/alt_cpriphy_c3_csr.v
filetypes: ff
dirname:
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filenames: altera_avalon_mutex.h
filetypes: f
dirname:
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filetypes: fffff
dirname:
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filenames:
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
filetypes: ffff
dirname:
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filenames: alt_vip_pip_sop_realign.sv
filetypes: f
dirname:
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filetypes: dfffddd
dirname:
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filenames:
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filenames: altera_eth_avst2gmii_converter.v
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_vip_common_pip_merge.sv
filetypes: f
dirname:
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filenames: alt_vip_common_sync.v
filetypes: f
dirname:
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filetypes: ffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: aldec/alt_vip_crs_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
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filetypes: fffffffffff
dirname:
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filenames:
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filenames: rx_top.v.terp/sdi_ii_rx_rcfg_a10.sv/sdi_rx_sys.tcl.terp
filetypes: fff
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: dfff
dirname:
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filenames:
  mif/mr_compare_threshold_tx_iopll_ls_frl.sv/mr_tx_iopll_ls_frl.qip/rcfg_array_streamer_tx_iopll_ls_frl_incl.sv


filenames: SAS-Gen1.1.qprs/SAS-Gen1.qprs/SAS-Gen2.qprs
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_xcvr/altera_xcvr_native_phy/avgz/presets/SAS


filenames: alt_vip_vfb_sync_ctrl.sv
filetypes: f
dirname:
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filenames: alt_e100_top_sv.qpf/alt_e100_top_sv.qsf/alt_e100_top_sv.v
filetypes: fff
dirname:
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filetypes: fff
dirname:
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filenames:
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filenames: rx/top/tx
filetypes: ddd
dirname:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/quartus/common/devinfo/14nm/nd5revb
filenames:
  bcm2bits_db/db_nd5revb_h_gx_es2fbga1760_parasitic.db/db_nd5revb_h_gx_es2fbga2397b_parasitic.db/db_nd5revb_h_gx_es2fbga2912e_parasitic.db/db_nd5revb_l_gx_eccnfbga1760_parasitic.db/db_nd5revb_l_gx_es3fbga1760_parasitic.db/db_nd5revb_l_gx_es3fbga2397b_parasitic.db/db_nd5revb_l_gx_vfbga1760_parasitic.db/db_nd5revb_l_gx_vfbga2397b_parasitic.db/db_nd5revb_l_gx_vfbga2912e_parasitic.db/db_nd5revb_l_gxfbga1760_parasitic.db/db_nd5revb_l_gxfbga2397b_parasitic.db/db_nd5revb_l_gxfbga2912e_parasitic.db/db_nd5revb_l_sx_es2fbga1760_parasitic.db/db_nd5revb_l_sx_es2fbga2397b_parasitic.db/db_nd5revb_l_sx_es3fbga1760_parasitic.db/db_nd5revb_l_sx_es3fbga2397b_parasitic.db/db_nd5revb_l_sx_esfbga1760_parasitic.db/db_nd5revb_l_sx_esfbga2397b_parasitic.db/db_nd5revb_l_sx_vfbga1760_parasitic.db/db_nd5revb_l_sx_vfbga2397b_parasitic.db/db_nd5revb_l_sx_vfbga2912e_parasitic.db/db_nd5revb_l_sxfbga1760_parasitic.db/db_nd5revb_l_sxfbga2397b_parasitic.db/db_nd5revb_l_sxfbga2597v_parasitic.db/db_nd5revb_l_sxfbga2912e_parasitic.db/db_nd5revbfbga1760_parasitic.db/db_nd5revbfbga2397b_parasitic.db/db_nd5revbfbga2912e_parasitic.db/ddb_nd5revb-1_reva_900mv_0c.dmf.ddb/ddb_nd5revb-1_reva_900mv_100c.dmf.ddb/ddb_nd5revb-1_reva_900mv_110c.dmf.ddb/ddb_nd5revb-1_reva_900mv_125c.dmf.ddb/ddb_nd5revb-1_reva_900mv_n40c.dmf.ddb/ddb_nd5revb-1_reva_vid1_0c.dmf.ddb/ddb_nd5revb-1_reva_vid1_100c.dmf.ddb/ddb_nd5revb-1_reva_vid1_110c.dmf.ddb/ddb_nd5revb-1_reva_vid1_125c.dmf.ddb/ddb_nd5revb-1_reva_vid1_n40c.dmf.ddb/ddb_nd5revb-1_revb_900mv_0c.dmf.ddb/ddb_nd5revb-1_revb_900mv_0c_fdi.ddb/ddb_nd5revb-1_revb_900mv_100c.dmf.ddb/ddb_nd5revb-1_revb_900mv_100c_dem.ddb/ddb_nd5revb-1_revb_900mv_100c_fdi.ddb/ddb_nd5revb-1_revb_900mv_110c.dmf.ddb/ddb_nd5revb-1_revb_900mv_125c.dmf.ddb/ddb_nd5revb-1_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-1_revb_900mv_n40c_fdi.ddb/ddb_nd5revb-1_revb_vid1_0c.dmf.ddb/ddb_nd5revb-1_revb_vid1_0c_fdi.ddb/ddb_nd5revb-1_revb_vid1_100c.dmf.ddb/ddb_nd5revb-1_revb_vid1_100c_fdi.ddb/ddb_nd5revb-1_revb_vid1_110c.dmf.ddb/ddb_nd5revb-1_revb_vid1_125c.dmf.ddb/ddb_nd5revb-1_revb_vid1_n40c.dmf.ddb/ddb_nd5revb-1_revb_vid1_n40c_fdi.ddb/ddb_nd5revb-1_reves_900mv_0c.dmf.ddb/ddb_nd5revb-1_reves_900mv_0c_fdi.ddb/ddb_nd5revb-1_reves_900mv_100c.dmf.ddb/ddb_nd5revb-1_reves_900mv_100c_dem.ddb/ddb_nd5revb-1_reves_900mv_100c_fdi.ddb/ddb_nd5revb-1_reves_900mv_110c.dmf.ddb/ddb_nd5revb-1_reves_900mv_125c.dmf.ddb/ddb_nd5revb-1_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-1_reves_900mv_n40c_fdi.ddb/ddb_nd5revb-1_reves_vid1_0c.dmf.ddb/ddb_nd5revb-1_reves_vid1_0c_fdi.ddb/ddb_nd5revb-1_reves_vid1_100c.dmf.ddb/ddb_nd5revb-1_reves_vid1_100c_fdi.ddb/ddb_nd5revb-1_reves_vid1_110c.dmf.ddb/ddb_nd5revb-1_reves_vid1_125c.dmf.ddb/ddb_nd5revb-1_reves_vid1_n40c.dmf.ddb/ddb_nd5revb-1_reves_vid1_n40c_fdi.ddb/ddb_nd5revb-1_revesa_900mv_0c.dmf.ddb/ddb_nd5revb-1_revesa_900mv_100c.dmf.ddb/ddb_nd5revb-1_revesa_900mv_110c.dmf.ddb/ddb_nd5revb-1_revesa_900mv_125c.dmf.ddb/ddb_nd5revb-1_revesa_900mv_n40c.dmf.ddb/ddb_nd5revb-1_revesa_vid1_0c.dmf.ddb/ddb_nd5revb-1_revesa_vid1_100c.dmf.ddb/ddb_nd5revb-1_revesa_vid1_110c.dmf.ddb/ddb_nd5revb-1_revesa_vid1_125c.dmf.ddb/ddb_nd5revb-1_revesa_vid1_n40c.dmf.ddb/ddb_nd5revb-1_revprod_900mv_0c.dmf.ddb/ddb_nd5revb-1_revprod_900mv_0c_fdi.ddb/ddb_nd5revb-1_revprod_900mv_100c.dmf.ddb/ddb_nd5revb-1_revprod_900mv_100c_dem.ddb/ddb_nd5revb-1_revprod_900mv_100c_fdi.ddb/ddb_nd5revb-1_revprod_900mv_110c.dmf.ddb/ddb_nd5revb-1_revprod_900mv_110c_dem.ddb/ddb_nd5revb-1_revprod_900mv_110c_fdi.ddb/ddb_nd5revb-1_revprod_900mv_125c.dmf.ddb/ddb_nd5revb-1_revprod_900mv_n40c.dmf.ddb/ddb_nd5revb-1_revprod_900mv_n40c_fdi.ddb/ddb_nd5revb-1_revprod_vid1_0c.dmf.ddb/ddb_nd5revb-1_revprod_vid1_0c_fdi.ddb/ddb_nd5revb-1_revprod_vid1_100c.dmf.ddb/ddb_nd5revb-1_revprod_vid1_100c_fdi.ddb/ddb_nd5revb-1_revprod_vid1_110c.dmf.ddb/ddb_nd5revb-1_revprod_vid1_110c_fdi.ddb/ddb_nd5revb-1_revprod_vid1_125c.dmf.ddb/ddb_nd5revb-1_revprod_vid1_n40c.dmf.ddb/ddb_nd5revb-1_revprod_vid1_n40c_fdi.ddb/ddb_nd5revb-2_reva_850mv_0c.dmf.ddb/ddb_nd5revb-2_reva_850mv_100c.dmf.ddb/ddb_nd5revb-2_reva_850mv_110c.dmf.ddb/ddb_nd5revb-2_reva_850mv_125c.dmf.ddb/ddb_nd5revb-2_reva_850mv_n40c.dmf.ddb/ddb_nd5revb-2_reva_900mv_0c.dmf.ddb/ddb_nd5revb-2_reva_900mv_100c.dmf.ddb/ddb_nd5revb-2_reva_900mv_110c.dmf.ddb/ddb_nd5revb-2_reva_900mv_125c.dmf.ddb/ddb_nd5revb-2_reva_900mv_n40c.dmf.ddb/ddb_nd5revb-2_reva_vid2_0c.dmf.ddb/ddb_nd5revb-2_reva_vid2_100c.dmf.ddb/ddb_nd5revb-2_reva_vid2_110c.dmf.ddb/ddb_nd5revb-2_reva_vid2_125c.dmf.ddb/ddb_nd5revb-2_reva_vid2_n40c.dmf.ddb/ddb_nd5revb-2_revb_850mv_0c.dmf.ddb/ddb_nd5revb-2_revb_850mv_100c.dmf.ddb/ddb_nd5revb-2_revb_850mv_110c.dmf.ddb/ddb_nd5revb-2_revb_850mv_125c.dmf.ddb/ddb_nd5revb-2_revb_850mv_n40c.dmf.ddb/ddb_nd5revb-2_revb_900mv_0c.dmf.ddb/ddb_nd5revb-2_revb_900mv_0c_fdi.ddb/ddb_nd5revb-2_revb_900mv_100c.dmf.ddb/ddb_nd5revb-2_revb_900mv_100c_dem.ddb/ddb_nd5revb-2_revb_900mv_100c_fdi.ddb/ddb_nd5revb-2_revb_900mv_110c.dmf.ddb/ddb_nd5revb-2_revb_900mv_125c.dmf.ddb/ddb_nd5revb-2_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-2_revb_900mv_n40c_fdi.ddb/ddb_nd5revb-2_revb_vid2_0c.dmf.ddb/ddb_nd5revb-2_revb_vid2_0c_fdi.ddb/ddb_nd5revb-2_revb_vid2_100c.dmf.ddb/ddb_nd5revb-2_revb_vid2_100c_fdi.ddb/ddb_nd5revb-2_revb_vid2_110c.dmf.ddb/ddb_nd5revb-2_revb_vid2_125c.dmf.ddb/ddb_nd5revb-2_revb_vid2_n40c.dmf.ddb/ddb_nd5revb-2_revb_vid2_n40c_fdi.ddb/ddb_nd5revb-2_reves_850mv_0c.dmf.ddb/ddb_nd5revb-2_reves_850mv_0c_fdi.ddb/ddb_nd5revb-2_reves_850mv_100c.dmf.ddb/ddb_nd5revb-2_reves_850mv_100c_dem.ddb/ddb_nd5revb-2_reves_850mv_100c_fdi.ddb/ddb_nd5revb-2_reves_850mv_110c.dmf.ddb/ddb_nd5revb-2_reves_850mv_110c_dem.ddb/ddb_nd5revb-2_reves_850mv_110c_fdi.ddb/ddb_nd5revb-2_reves_850mv_125c.dmf.ddb/ddb_nd5revb-2_reves_850mv_n40c.dmf.ddb/ddb_nd5revb-2_reves_900mv_0c.dmf.ddb/ddb_nd5revb-2_reves_900mv_0c_fdi.ddb/ddb_nd5revb-2_reves_900mv_100c.dmf.ddb/ddb_nd5revb-2_reves_900mv_100c_dem.ddb/ddb_nd5revb-2_reves_900mv_100c_fdi.ddb/ddb_nd5revb-2_reves_900mv_110c.dmf.ddb/ddb_nd5revb-2_reves_900mv_110c_dem.ddb/ddb_nd5revb-2_reves_900mv_110c_fdi.ddb/ddb_nd5revb-2_reves_900mv_125c.dmf.ddb/ddb_nd5revb-2_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-2_reves_900mv_n40c_fdi.ddb/ddb_nd5revb-2_reves_vid2_0c.dmf.ddb/ddb_nd5revb-2_reves_vid2_0c_fdi.ddb/ddb_nd5revb-2_reves_vid2_100c.dmf.ddb/ddb_nd5revb-2_reves_vid2_100c_fdi.ddb/ddb_nd5revb-2_reves_vid2_110c.dmf.ddb/ddb_nd5revb-2_reves_vid2_110c_fdi.ddb/ddb_nd5revb-2_reves_vid2_125c.dmf.ddb/ddb_nd5revb-2_reves_vid2_n40c.dmf.ddb/ddb_nd5revb-2_reves_vid2_n40c_fdi.ddb/ddb_nd5revb-2_revesa_850mv_0c.dmf.ddb/ddb_nd5revb-2_revesa_850mv_100c.dmf.ddb/ddb_nd5revb-2_revesa_850mv_110c.dmf.ddb/ddb_nd5revb-2_revesa_850mv_125c.dmf.ddb/ddb_nd5revb-2_revesa_850mv_n40c.dmf.ddb/ddb_nd5revb-2_revesa_900mv_0c.dmf.ddb/ddb_nd5revb-2_revesa_900mv_100c.dmf.ddb/ddb_nd5revb-2_revesa_900mv_110c.dmf.ddb/ddb_nd5revb-2_revesa_900mv_125c.dmf.ddb/ddb_nd5revb-2_revesa_900mv_n40c.dmf.ddb/ddb_nd5revb-2_revesa_vid2_0c.dmf.ddb/ddb_nd5revb-2_revesa_vid2_100c.dmf.ddb/ddb_nd5revb-2_revesa_vid2_110c.dmf.ddb/ddb_nd5revb-2_revesa_vid2_125c.dmf.ddb/ddb_nd5revb-2_revesa_vid2_n40c.dmf.ddb/ddb_nd5revb-2_revprod_850mv_0c.dmf.ddb/ddb_nd5revb-2_revprod_850mv_0c_fdi.ddb/ddb_nd5revb-2_revprod_850mv_100c.dmf.ddb/ddb_nd5revb-2_revprod_850mv_100c_dem.ddb/ddb_nd5revb-2_revprod_850mv_100c_fdi.ddb/ddb_nd5revb-2_revprod_850mv_110c.dmf.ddb/ddb_nd5revb-2_revprod_850mv_110c_dem.ddb/ddb_nd5revb-2_revprod_850mv_110c_fdi.ddb/ddb_nd5revb-2_revprod_850mv_125c.dmf.ddb/ddb_nd5revb-2_revprod_850mv_n40c.dmf.ddb/ddb_nd5revb-2_revprod_850mv_n40c_fdi.ddb/ddb_nd5revb-2_revprod_900mv_0c.dmf.ddb/ddb_nd5revb-2_revprod_900mv_0c_fdi.ddb/ddb_nd5revb-2_revprod_900mv_100c.dmf.ddb/ddb_nd5revb-2_revprod_900mv_100c_dem.ddb/ddb_nd5revb-2_revprod_900mv_100c_fdi.ddb/ddb_nd5revb-2_revprod_900mv_110c.dmf.ddb/ddb_nd5revb-2_revprod_900mv_110c_dem.ddb/ddb_nd5revb-2_revprod_900mv_110c_fdi.ddb/ddb_nd5revb-2_revprod_900mv_125c.dmf.ddb/ddb_nd5revb-2_revprod_900mv_n40c.dmf.ddb/ddb_nd5revb-2_revprod_900mv_n40c_fdi.ddb/ddb_nd5revb-2_revprod_vid2_0c.dmf.ddb/ddb_nd5revb-2_revprod_vid2_0c_fdi.ddb/ddb_nd5revb-2_revprod_vid2_100c.dmf.ddb/ddb_nd5revb-2_revprod_vid2_100c_fdi.ddb/ddb_nd5revb-2_revprod_vid2_110c.dmf.ddb/ddb_nd5revb-2_revprod_vid2_110c_fdi.ddb/ddb_nd5revb-2_revprod_vid2_125c.dmf.ddb/ddb_nd5revb-2_revprod_vid2_n40c.dmf.ddb/ddb_nd5revb-2_revprod_vid2_n40c_fdi.ddb/ddb_nd5revb-3_reva_850mv_0c.dmf.ddb/ddb_nd5revb-3_reva_850mv_100c.dmf.ddb/ddb_nd5revb-3_reva_850mv_110c.dmf.ddb/ddb_nd5revb-3_reva_850mv_125c.dmf.ddb/ddb_nd5revb-3_reva_850mv_n40c.dmf.ddb/ddb_nd5revb-3_reva_900mv_0c.dmf.ddb/ddb_nd5revb-3_reva_900mv_100c.dmf.ddb/ddb_nd5revb-3_reva_900mv_110c.dmf.ddb/ddb_nd5revb-3_reva_900mv_125c.dmf.ddb/ddb_nd5revb-3_reva_900mv_n40c.dmf.ddb/ddb_nd5revb-3_reva_vid3a_0c.dmf.ddb/ddb_nd5revb-3_reva_vid3a_100c.dmf.ddb/ddb_nd5revb-3_reva_vid3a_110c.dmf.ddb/ddb_nd5revb-3_reva_vid3a_125c.dmf.ddb/ddb_nd5revb-3_reva_vid3a_n40c.dmf.ddb/ddb_nd5revb-3_revb_850mv_0c.dmf.ddb/ddb_nd5revb-3_revb_850mv_100c.dmf.ddb/ddb_nd5revb-3_revb_850mv_110c.dmf.ddb/ddb_nd5revb-3_revb_850mv_125c.dmf.ddb/ddb_nd5revb-3_revb_850mv_n40c.dmf.ddb/ddb_nd5revb-3_revb_900mv_0c.dmf.ddb/ddb_nd5revb-3_revb_900mv_0c_fdi.ddb/ddb_nd5revb-3_revb_900mv_100c.dmf.ddb/ddb_nd5revb-3_revb_900mv_100c_dem.ddb/ddb_nd5revb-3_revb_900mv_100c_fdi.ddb/ddb_nd5revb-3_revb_900mv_110c.dmf.ddb/ddb_nd5revb-3_revb_900mv_125c.dmf.ddb/ddb_nd5revb-3_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-3_revb_900mv_n40c_fdi.ddb/ddb_nd5revb-3_revb_vid3a_0c.dmf.ddb/ddb_nd5revb-3_revb_vid3a_0c_fdi.ddb/ddb_nd5revb-3_revb_vid3a_100c.dmf.ddb/ddb_nd5revb-3_revb_vid3a_100c_fdi.ddb/ddb_nd5revb-3_revb_vid3a_110c.dmf.ddb/ddb_nd5revb-3_revb_vid3a_125c.dmf.ddb/ddb_nd5revb-3_revb_vid3a_n40c.dmf.ddb/ddb_nd5revb-3_revb_vid3a_n40c_fdi.ddb/ddb_nd5revb-3_reves_850mv_0c.dmf.ddb/ddb_nd5revb-3_reves_850mv_100c.dmf.ddb/ddb_nd5revb-3_reves_850mv_110c.dmf.ddb/ddb_nd5revb-3_reves_850mv_125c.dmf.ddb/ddb_nd5revb-3_reves_850mv_n40c.dmf.ddb/ddb_nd5revb-3_reves_900mv_0c.dmf.ddb/ddb_nd5revb-3_reves_900mv_0c_fdi.ddb/ddb_nd5revb-3_reves_900mv_100c.dmf.ddb/ddb_nd5revb-3_reves_900mv_100c_dem.ddb/ddb_nd5revb-3_reves_900mv_100c_fdi.ddb/ddb_nd5revb-3_reves_900mv_110c.dmf.ddb/ddb_nd5revb-3_reves_900mv_125c.dmf.ddb/ddb_nd5revb-3_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-3_reves_900mv_n40c_fdi.ddb/ddb_nd5revb-3_reves_vid3a_0c.dmf.ddb/ddb_nd5revb-3_reves_vid3a_0c_fdi.ddb/ddb_nd5revb-3_reves_vid3a_100c.dmf.ddb/ddb_nd5revb-3_reves_vid3a_100c_fdi.ddb/ddb_nd5revb-3_reves_vid3a_110c.dmf.ddb/ddb_nd5revb-3_reves_vid3a_125c.dmf.ddb/ddb_nd5revb-3_reves_vid3a_n40c.dmf.ddb/ddb_nd5revb-3_reves_vid3a_n40c_fdi.ddb/ddb_nd5revb-3_revesa_850mv_0c.dmf.ddb/ddb_nd5revb-3_revesa_850mv_100c.dmf.ddb/ddb_nd5revb-3_revesa_850mv_110c.dmf.ddb/ddb_nd5revb-3_revesa_850mv_125c.dmf.ddb/ddb_nd5revb-3_revesa_850mv_n40c.dmf.ddb/ddb_nd5revb-3_revesa_900mv_0c.dmf.ddb/ddb_nd5revb-3_revesa_900mv_100c.dmf.ddb/ddb_nd5revb-3_revesa_900mv_110c.dmf.ddb/ddb_nd5revb-3_revesa_900mv_125c.dmf.ddb/ddb_nd5revb-3_revesa_900mv_n40c.dmf.ddb/ddb_nd5revb-3_revesa_vid3a_0c.dmf.ddb/ddb_nd5revb-3_revesa_vid3a_100c.dmf.ddb/ddb_nd5revb-3_revesa_vid3a_110c.dmf.ddb/ddb_nd5revb-3_revesa_vid3a_125c.dmf.ddb/ddb_nd5revb-3_revesa_vid3a_n40c.dmf.ddb/ddb_nd5revb-3_revprod_850mv_0c.dmf.ddb/ddb_nd5revb-3_revprod_850mv_0c_fdi.ddb/ddb_nd5revb-3_revprod_850mv_100c.dmf.ddb/ddb_nd5revb-3_revprod_850mv_100c_dem.ddb/ddb_nd5revb-3_revprod_850mv_100c_fdi.ddb/ddb_nd5revb-3_revprod_850mv_110c.dmf.ddb/ddb_nd5revb-3_revprod_850mv_110c_dem.ddb/ddb_nd5revb-3_revprod_850mv_110c_fdi.ddb/ddb_nd5revb-3_revprod_850mv_125c.dmf.ddb/ddb_nd5revb-3_revprod_850mv_n40c.dmf.ddb/ddb_nd5revb-3_revprod_850mv_n40c_fdi.ddb/ddb_nd5revb-3_revprod_900mv_0c.dmf.ddb/ddb_nd5revb-3_revprod_900mv_0c_fdi.ddb/ddb_nd5revb-3_revprod_900mv_100c.dmf.ddb/ddb_nd5revb-3_revprod_900mv_100c_dem.ddb/ddb_nd5revb-3_revprod_900mv_100c_fdi.ddb/ddb_nd5revb-3_revprod_900mv_110c.dmf.ddb/ddb_nd5revb-3_revprod_900mv_110c_dem.ddb/ddb_nd5revb-3_revprod_900mv_110c_fdi.ddb/ddb_nd5revb-3_revprod_900mv_125c.dmf.ddb/ddb_nd5revb-3_revprod_900mv_n40c.dmf.ddb/ddb_nd5revb-3_revprod_900mv_n40c_fdi.ddb/ddb_nd5revb-3_revprod_vid3a_0c.dmf.ddb/ddb_nd5revb-3_revprod_vid3a_0c_fdi.ddb/ddb_nd5revb-3_revprod_vid3a_100c.dmf.ddb/ddb_nd5revb-3_revprod_vid3a_100c_fdi.ddb/ddb_nd5revb-3_revprod_vid3a_110c.dmf.ddb/ddb_nd5revb-3_revprod_vid3a_110c_fdi.ddb/ddb_nd5revb-3_revprod_vid3a_125c.dmf.ddb/ddb_nd5revb-3_revprod_vid3a_n40c.dmf.ddb/ddb_nd5revb-3_revprod_vid3a_n40c_fdi.ddb/ddb_nd5revb-ff_reva_800mv_0c.dmf.ddb/ddb_nd5revb-ff_reva_800mv_100c.dmf.ddb/ddb_nd5revb-ff_reva_800mv_110c.dmf.ddb/ddb_nd5revb-ff_reva_800mv_125c.dmf.ddb/ddb_nd5revb-ff_reva_800mv_n40c.dmf.ddb/ddb_nd5revb-ff_reva_850mv_0c.dmf.ddb/ddb_nd5revb-ff_reva_850mv_100c.dmf.ddb/ddb_nd5revb-ff_reva_850mv_110c.dmf.ddb/ddb_nd5revb-ff_reva_850mv_125c.dmf.ddb/ddb_nd5revb-ff_reva_850mv_n40c.dmf.ddb/ddb_nd5revb-ff_reva_900mv_0c.dmf.ddb/ddb_nd5revb-ff_reva_900mv_100c.dmf.ddb/ddb_nd5revb-ff_reva_900mv_110c.dmf.ddb/ddb_nd5revb-ff_reva_900mv_125c.dmf.ddb/ddb_nd5revb-ff_reva_900mv_n40c.dmf.ddb/ddb_nd5revb-ff_reva_vid1_0c.dmf.ddb/ddb_nd5revb-ff_reva_vid1_100c.dmf.ddb/ddb_nd5revb-ff_reva_vid1_110c.dmf.ddb/ddb_nd5revb-ff_reva_vid1_125c.dmf.ddb/ddb_nd5revb-ff_reva_vid1_n40c.dmf.ddb/ddb_nd5revb-ff_revb_800mv_0c.dmf.ddb/ddb_nd5revb-ff_revb_800mv_100c.dmf.ddb/ddb_nd5revb-ff_revb_800mv_110c.dmf.ddb/ddb_nd5revb-ff_revb_800mv_125c.dmf.ddb/ddb_nd5revb-ff_revb_800mv_n40c.dmf.ddb/ddb_nd5revb-ff_revb_850mv_0c.dmf.ddb/ddb_nd5revb-ff_revb_850mv_100c.dmf.ddb/ddb_nd5revb-ff_revb_850mv_110c.dmf.ddb/ddb_nd5revb-ff_revb_850mv_125c.dmf.ddb/ddb_nd5revb-ff_revb_850mv_n40c.dmf.ddb/ddb_nd5revb-ff_revb_900mv_0c.dmf.ddb/ddb_nd5revb-ff_revb_900mv_100c.dmf.ddb/ddb_nd5revb-ff_revb_900mv_110c.dmf.ddb/ddb_nd5revb-ff_revb_900mv_125c.dmf.ddb/ddb_nd5revb-ff_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-ff_revb_vid1_0c.dmf.ddb/ddb_nd5revb-ff_revb_vid1_100c.dmf.ddb/ddb_nd5revb-ff_revb_vid1_110c.dmf.ddb/ddb_nd5revb-ff_revb_vid1_125c.dmf.ddb/ddb_nd5revb-ff_revb_vid1_n40c.dmf.ddb/ddb_nd5revb-ff_reves_800mv_0c.dmf.ddb/ddb_nd5revb-ff_reves_800mv_100c.dmf.ddb/ddb_nd5revb-ff_reves_800mv_110c.dmf.ddb/ddb_nd5revb-ff_reves_800mv_125c.dmf.ddb/ddb_nd5revb-ff_reves_800mv_n40c.dmf.ddb/ddb_nd5revb-ff_reves_850mv_0c.dmf.ddb/ddb_nd5revb-ff_reves_850mv_100c.dmf.ddb/ddb_nd5revb-ff_reves_850mv_110c.dmf.ddb/ddb_nd5revb-ff_reves_850mv_125c.dmf.ddb/ddb_nd5revb-ff_reves_850mv_n40c.dmf.ddb/ddb_nd5revb-ff_reves_900mv_0c.dmf.ddb/ddb_nd5revb-ff_reves_900mv_100c.dmf.ddb/ddb_nd5revb-ff_reves_900mv_110c.dmf.ddb/ddb_nd5revb-ff_reves_900mv_125c.dmf.ddb/ddb_nd5revb-ff_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-ff_reves_vid1_0c.dmf.ddb/ddb_nd5revb-ff_reves_vid1_100c.dmf.ddb/ddb_nd5revb-ff_reves_vid1_110c.dmf.ddb/ddb_nd5revb-ff_reves_vid1_125c.dmf.ddb/ddb_nd5revb-ff_reves_vid1_n40c.dmf.ddb/ddb_nd5revb-ff_revesa_800mv_0c.dmf.ddb/ddb_nd5revb-ff_revesa_800mv_100c.dmf.ddb/ddb_nd5revb-ff_revesa_800mv_110c.dmf.ddb/ddb_nd5revb-ff_revesa_800mv_125c.dmf.ddb/ddb_nd5revb-ff_revesa_800mv_n40c.dmf.ddb/ddb_nd5revb-ff_revesa_850mv_0c.dmf.ddb/ddb_nd5revb-ff_revesa_850mv_10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ddb/ddb_nd5revb-tt_reva_vid3a_0c.dmf.ddb/ddb_nd5revb-tt_reva_vid3a_100c.dmf.ddb/ddb_nd5revb-tt_reva_vid3a_110c.dmf.ddb/ddb_nd5revb-tt_reva_vid3a_125c.dmf.ddb/ddb_nd5revb-tt_reva_vid3a_n40c.dmf.ddb/ddb_nd5revb-tt_revb_800mv_0c.dmf.ddb/ddb_nd5revb-tt_revb_800mv_100c.dmf.ddb/ddb_nd5revb-tt_revb_800mv_110c.dmf.ddb/ddb_nd5revb-tt_revb_800mv_125c.dmf.ddb/ddb_nd5revb-tt_revb_800mv_n40c.dmf.ddb/ddb_nd5revb-tt_revb_850mv_0c.dmf.ddb/ddb_nd5revb-tt_revb_850mv_100c.dmf.ddb/ddb_nd5revb-tt_revb_850mv_110c.dmf.ddb/ddb_nd5revb-tt_revb_850mv_125c.dmf.ddb/ddb_nd5revb-tt_revb_850mv_n40c.dmf.ddb/ddb_nd5revb-tt_revb_900mv_0c.dmf.ddb/ddb_nd5revb-tt_revb_900mv_100c.dmf.ddb/ddb_nd5revb-tt_revb_900mv_110c.dmf.ddb/ddb_nd5revb-tt_revb_900mv_125c.dmf.ddb/ddb_nd5revb-tt_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-tt_revb_vid2_0c.dmf.ddb/ddb_nd5revb-tt_revb_vid2_100c.dmf.ddb/ddb_nd5revb-tt_revb_vid2_110c.dmf.ddb/ddb_nd5revb-tt_revb_vid2_125c.dmf.ddb/ddb_nd5revb-tt_revb_vid2_n40c.dmf.ddb/ddb_nd5revb-tt_revb_vid3a_0c.dmf.ddb/ddb_nd5revb-tt_revb_vid3a_100c.dmf.ddb/ddb_nd5revb-tt_revb_vid3a_110c.dmf.ddb/ddb_nd5revb-tt_revb_vid3a_125c.dmf.ddb/ddb_nd5revb-tt_revb_vid3a_n40c.dmf.ddb/ddb_nd5revb-tt_reves_800mv_0c.dmf.ddb/ddb_nd5revb-tt_reves_800mv_100c.dmf.ddb/ddb_nd5revb-tt_reves_800mv_110c.dmf.ddb/ddb_nd5revb-tt_reves_800mv_125c.dmf.ddb/ddb_nd5revb-tt_reves_800mv_n40c.dmf.ddb/ddb_nd5revb-tt_reves_850mv_0c.dmf.ddb/ddb_nd5revb-tt_reves_850mv_100c.dmf.ddb/ddb_nd5revb-tt_reves_850mv_110c.dmf.ddb/ddb_nd5revb-tt_reves_850mv_125c.dmf.ddb/ddb_nd5revb-tt_reves_850mv_n40c.dmf.ddb/ddb_nd5revb-tt_reves_900mv_0c.dmf.ddb/ddb_nd5revb-tt_reves_900mv_100c.dmf.ddb/ddb_nd5revb-tt_reves_900mv_110c.dmf.ddb/ddb_nd5revb-tt_reves_900mv_125c.dmf.ddb/ddb_nd5revb-tt_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-tt_reves_vid2_0c.dmf.ddb/ddb_nd5revb-tt_reves_vid2_100c.dmf.ddb/ddb_nd5revb-tt_reves_vid2_110c.dmf.ddb/ddb_nd5revb-tt_reves_vid2_125c.dmf.ddb/ddb_nd5revb-tt_reves_vid2_n40c.dmf.ddb/ddb_nd5revb-tt_reves_vid3a_0c.dmf.ddb/ddb_nd5revb-tt_reves_vid3a_100c.dmf.ddb/ddb_nd5revb-tt_reves_vid3a_110c.dmf.ddb/ddb_nd5revb-tt_reves_vid3a_125c.dmf.ddb/ddb_nd5revb-tt_reves_vid3a_n40c.dmf.ddb/ddb_nd5revb-tt_revesa_800mv_0c.dmf.ddb/ddb_nd5revb-tt_revesa_800mv_100c.dmf.ddb/ddb_nd5revb-tt_revesa_800mv_110c.dmf.ddb/ddb_nd5revb-tt_revesa_800mv_125c.dmf.ddb/ddb_nd5revb-tt_revesa_800mv_n40c.dmf.ddb/ddb_nd5revb-tt_revesa_850mv_0c.dmf.ddb/ddb_nd5revb-tt_revesa_850mv_100c.dmf.ddb/ddb_nd5revb-tt_revesa_850mv_110c.dmf.ddb/ddb_nd5revb-tt_revesa_850mv_125c.dmf.ddb/ddb_nd5revb-tt_revesa_850mv_n40c.dmf.ddb/ddb_nd5revb-tt_revesa_900mv_0c.dmf.ddb/ddb_nd5revb-tt_revesa_900mv_100c.dmf.ddb/ddb_nd5revb-tt_revesa_900mv_110c.dmf.ddb/ddb_nd5revb-tt_revesa_900mv_125c.dmf.ddb/ddb_nd5revb-tt_revesa_900mv_n40c.dmf.ddb/ddb_nd5revb-tt_revesa_vid2_0c.dmf.ddb/ddb_nd5revb-tt_revesa_vid2_100c.dmf.ddb/ddb_nd5revb-tt_revesa_vid2_110c.dmf.ddb/ddb_nd5revb-tt_revesa_vid2_125c.dmf.ddb/ddb_nd5revb-tt_revesa_vid2_n40c.dmf.ddb/ddb_nd5revb-tt_revesa_vid3a_0c.dmf.ddb/ddb_nd5revb-tt_revesa_vid3a_100c.dmf.ddb/ddb_nd5revb-tt_revesa_vid3a_110c.dmf.ddb/ddb_nd5revb-tt_revesa_vid3a_125c.dmf.ddb/ddb_nd5revb-tt_revesa_vid3a_n40c.dmf.ddb/ddb_nd5revb-tt_revprod_800mv_0c.dmf.ddb/ddb_nd5revb-tt_revprod_800mv_100c.dmf.ddb/ddb_nd5revb-tt_revprod_800mv_110c.dmf.ddb/ddb_nd5revb-tt_revprod_800mv_125c.dmf.ddb/ddb_nd5revb-tt_revprod_800mv_n40c.dmf.ddb/ddb_nd5revb-tt_revprod_850mv_0c.dmf.ddb/ddb_nd5revb-tt_revprod_850mv_100c.dmf.ddb/ddb_nd5revb-tt_revprod_850mv_110c.dmf.ddb/ddb_nd5revb-tt_revprod_850mv_125c.dmf.ddb/ddb_nd5revb-tt_revprod_850mv_n40c.dmf.ddb/ddb_nd5revb-tt_revprod_900mv_0c.dmf.ddb/ddb_nd5revb-tt_revprod_900mv_100c.dmf.ddb/ddb_nd5revb-tt_revprod_900mv_110c.dmf.ddb/ddb_nd5revb-tt_revprod_900mv_125c.dmf.ddb/ddb_nd5revb-tt_revprod_900mv_n40c.dmf.ddb/ddb_nd5revb-tt_revprod_vid2_0c.dmf.ddb/ddb_nd5revb-tt_revprod_vid2_100c.dmf.ddb/ddb_nd5revb-tt_revprod_vid2_110c.dmf.ddb/ddb_nd5revb-tt_revprod_vid2_125c.dmf.ddb/ddb_nd5revb-tt_revprod_vid2_n40c.dmf.ddb/ddb_nd5revb-tt_revprod_vid3a_0c.dmf.ddb/ddb_nd5revb-tt_revprod_vid3a_100c.dmf.ddb/ddb_nd5revb-tt_revprod_vid3a_110c.dmf.ddb/ddb_nd5revb-tt_revprod_vid3a_125c.dmf.ddb/ddb_nd5revb-tt_revprod_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttbin_reva_800mv_0c.dmf.ddb/ddb_nd5revb-ttbin_reva_800mv_100c.dmf.ddb/ddb_nd5revb-ttbin_reva_800mv_110c.dmf.ddb/ddb_nd5revb-ttbin_reva_800mv_125c.dmf.ddb/ddb_nd5revb-ttbin_reva_800mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_reva_850mv_0c.dmf.ddb/ddb_nd5revb-ttbin_reva_850mv_100c.dmf.ddb/ddb_nd5revb-ttbin_reva_850mv_110c.dmf.ddb/ddb_nd5revb-ttbin_reva_850mv_125c.dmf.ddb/ddb_nd5revb-ttbin_reva_850mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_reva_900mv_0c.dmf.ddb/ddb_nd5revb-ttbin_reva_900mv_100c.dmf.ddb/ddb_nd5revb-ttbin_reva_900mv_110c.dmf.ddb/ddb_nd5revb-ttbin_reva_900mv_125c.dmf.ddb/ddb_nd5revb-ttbin_reva_900mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid2_0c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid2_100c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid2_110c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid2_125c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid2_n40c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid3a_0c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid3a_100c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid3a_110c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid3a_125c.dmf.ddb/ddb_nd5revb-ttbin_reva_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttbin_revb_800mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revb_800mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revb_800mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revb_800mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revb_800mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revb_850mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revb_850mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revb_850mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revb_850mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revb_850mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revb_900mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revb_900mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revb_900mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revb_900mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid2_0c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid2_100c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid2_110c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid2_125c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid2_n40c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid3a_0c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid3a_100c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid3a_110c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid3a_125c.dmf.ddb/ddb_nd5revb-ttbin_revb_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttbin_reves_800mv_0c.dmf.ddb/ddb_nd5revb-ttbin_reves_800mv_100c.dmf.ddb/ddb_nd5revb-ttbin_reves_800mv_110c.dmf.ddb/ddb_nd5revb-ttbin_reves_800mv_125c.dmf.ddb/ddb_nd5revb-ttbin_reves_800mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_reves_850mv_0c.dmf.ddb/ddb_nd5revb-ttbin_reves_850mv_100c.dmf.ddb/ddb_nd5revb-ttbin_reves_850mv_110c.dmf.ddb/ddb_nd5revb-ttbin_reves_850mv_125c.dmf.ddb/ddb_nd5revb-ttbin_reves_850mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_reves_900mv_0c.dmf.ddb/ddb_nd5revb-ttbin_reves_900mv_100c.dmf.ddb/ddb_nd5revb-ttbin_reves_900mv_110c.dmf.ddb/ddb_nd5revb-ttbin_reves_900mv_125c.dmf.ddb/ddb_nd5revb-ttbin_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid2_0c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid2_100c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid2_110c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid2_125c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid2_n40c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid3a_0c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid3a_100c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid3a_110c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid3a_125c.dmf.ddb/ddb_nd5revb-ttbin_reves_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttbin_revesa_800mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revesa_800mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revesa_800mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revesa_800mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revesa_800mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revesa_850mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revesa_850mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revesa_850mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revesa_850mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revesa_850mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revesa_900mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revesa_900mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revesa_900mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revesa_900mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revesa_900mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid2_0c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid2_100c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid2_110c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid2_125c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid2_n40c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid3a_0c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid3a_100c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid3a_110c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid3a_125c.dmf.ddb/ddb_nd5revb-ttbin_revesa_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttbin_revprod_800mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revprod_800mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revprod_800mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revprod_800mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revprod_800mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revprod_850mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revprod_850mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revprod_850mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revprod_850mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revprod_850mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revprod_900mv_0c.dmf.ddb/ddb_nd5revb-ttbin_revprod_900mv_100c.dmf.ddb/ddb_nd5revb-ttbin_revprod_900mv_110c.dmf.ddb/ddb_nd5revb-ttbin_revprod_900mv_125c.dmf.ddb/ddb_nd5revb-ttbin_revprod_900mv_n40c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid2_0c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid2_100c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid2_110c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid2_125c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid2_n40c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid3a_0c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid3a_100c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid3a_110c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid3a_125c.dmf.ddb/ddb_nd5revb-ttbin_revprod_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reva_800mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_reva_800mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_reva_800mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_reva_800mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_reva_800mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reva_850mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_reva_850mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_reva_850mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_reva_850mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_reva_850mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reva_900mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_reva_900mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_reva_900mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_reva_900mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_reva_900mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid2_0c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid2_100c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid2_110c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid2_125c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid2_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid3a_0c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid3a_100c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid3a_110c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid3a_125c.dmf.ddb/ddb_nd5revb-ttscaled_reva_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revb_800mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revb_800mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revb_800mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revb_800mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revb_800mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revb_850mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revb_850mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revb_850mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revb_850mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revb_850mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revb_900mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revb_900mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revb_900mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revb_900mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revb_900mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid2_0c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid2_100c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid2_110c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid2_125c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid2_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid3a_0c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid3a_100c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid3a_110c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid3a_125c.dmf.ddb/ddb_nd5revb-ttscaled_revb_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reves_800mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_reves_800mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_reves_800mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_reves_800mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_reves_800mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reves_850mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_reves_850mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_reves_850mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_reves_850mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_reves_850mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reves_900mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_reves_900mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_reves_900mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_reves_900mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_reves_900mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid2_0c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid2_100c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid2_110c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid2_125c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid2_n40c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid3a_0c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid3a_100c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid3a_110c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid3a_125c.dmf.ddb/ddb_nd5revb-ttscaled_reves_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_800mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_800mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_800mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_800mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_800mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_850mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_850mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_850mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_850mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_850mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_900mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_900mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_900mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_900mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_900mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid2_0c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid2_100c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid2_110c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid2_125c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid2_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid3a_0c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid3a_100c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid3a_110c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid3a_125c.dmf.ddb/ddb_nd5revb-ttscaled_revesa_vid3a_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_800mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_800mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_800mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_800mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_800mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_850mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_850mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_850mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_850mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_850mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_900mv_0c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_900mv_100c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_900mv_110c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_900mv_125c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_900mv_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid2_0c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid2_100c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid2_110c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid2_125c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid2_n40c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid3a_0c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid3a_100c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid3a_110c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid3a_125c.dmf.ddb/ddb_nd5revb-ttscaled_revprod_vid3a_n40c.dmf.ddb/ddb_nd5revb.translate.pb/ddb_nd5revb_ares.ddb/ddb_nd5revb_asmm.ddb/ddb_nd5revb_bcm_asm_data.ddb/ddb_nd5revb_bcm_device.ddb/ddb_nd5revb_bcm_floorplan.ddb/ddb_nd5revb_bcm_powerdown.ddb/ddb_nd5revb_clock_util.bdb/ddb_nd5revb_constra.ddb/ddb_nd5revb_constra_ttk.ddb/ddb_nd5revb_crosstalk_uisf_crosstalk.ddb/ddb_nd5revb_die_comb.ddb/ddb_nd5revb_dspf_route_info_manager_default.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_clkredct.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_clocks.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_crete.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_lab_dsp_carry_chain.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_red_tax.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_redundancy.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_redundancy_print.ddb/ddb_nd5revb_dspf_route_info_manager_nadder_ufict.ddb/ddb_nd5revb_dspf_routing_models_common.mdb/ddb_nd5revb_dspf_routing_models_prcf.mdb/ddb_nd5revb_dspf_routing_models_prcs.mdb/ddb_nd5revb_dspf_routing_models_tttt.mdb/ddb_nd5revb_gid_database.ddb/ddb_nd5revb_gui_pad_info.json/ddb_nd5revb_h_gx_es2_hdr.ddb/ddb_nd5revb_h_gx_es2_pad.ddb/ddb_nd5revb_h_gx_es2fbga1760_pkg.ddb/ddb_nd5revb_h_gx_es2fbga2397b_pkg.ddb/ddb_nd5revb_h_gx_es2fbga2912e_pkg.ddb/ddb_nd5revb_hdr.ddb/ddb_nd5revb_info_counts.ddb/ddb_nd5revb_l_gx_eccn_hdr.ddb/ddb_nd5revb_l_gx_eccn_pad.ddb/ddb_nd5revb_l_gx_eccnfbga1760_pkg.ddb/ddb_nd5revb_l_gx_es3_hdr.ddb/ddb_nd5revb_l_gx_es3_pad.ddb/ddb_nd5revb_l_gx_es3fbga1760_pkg.ddb/ddb_nd5revb_l_gx_es3fbga2397b_pkg.ddb/ddb_nd5revb_l_gx_gui_pad_info.json/ddb_nd5revb_l_gx_hdr.ddb/ddb_nd5revb_l_gx_pad.ddb/ddb_nd5revb_l_gx_v_hdr.ddb/ddb_nd5revb_l_gx_v_pad.ddb/ddb_nd5revb_l_gx_vfbga1760_pkg.ddb/ddb_nd5revb_l_gx_vfbga2397b_pkg.ddb/ddb_nd5revb_l_gx_vfbga2912e_pkg.ddb/ddb_nd5revb_l_gxfbga1760_pkg.ddb/ddb_nd5revb_l_gxfbga2397b_pkg.ddb/ddb_nd5revb_l_gxfbga2912e_pkg.ddb/ddb_nd5revb_l_pad.ddb/ddb_nd5revb_l_sx_es2_hdr.ddb/ddb_nd5revb_l_sx_es2_pad.ddb/ddb_nd5revb_l_sx_es2fbga1760_pkg.ddb/ddb_nd5revb_l_sx_es2fbga2397b_pkg.ddb/ddb_nd5revb_l_sx_es3_hdr.ddb/ddb_nd5revb_l_sx_es3_pad.ddb/ddb_nd5revb_l_sx_es3fbga1760_pkg.ddb/ddb_nd5revb_l_sx_es3fbga2397b_pkg.ddb/ddb_nd5revb_l_sx_es_hdr.ddb/ddb_nd5revb_l_sx_es_pad.ddb/ddb_nd5revb_l_sx_esfbga1760_pkg.ddb/ddb_nd5revb_l_sx_esfbga2397b_pkg.ddb/ddb_nd5revb_l_sx_hdr.ddb/ddb_nd5revb_l_sx_pad.ddb/ddb_nd5revb_l_sx_v_hdr.ddb/ddb_nd5revb_l_sx_v_pad.ddb/ddb_nd5revb_l_sx_vfbga1760_pkg.ddb/ddb_nd5revb_l_sx_vfbga2397b_pkg.ddb/ddb_nd5revb_l_sx_vfbga2912e_pkg.ddb/ddb_nd5revb_l_sxfbga1760_pkg.ddb/ddb_nd5revb_l_sxfbga2397b_pkg.ddb/ddb_nd5revb_l_sxfbga2597v_pkg.ddb/ddb_nd5revb_l_sxfbga2912e_pkg.ddb/ddb_nd5revb_pad.ddb/ddb_nd5revb_place.ddb/ddb_nd5revb_routing.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ff_hold_125_bin2s_pisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ff_hold_m40_bin2s_pifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ff_spd_0_bin1_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ff_spd_100_bin1_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ss_spd_0_bin2v_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ss_spd_0_bin3v_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ss_spd_100_bin2v_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_ss_spd_100_bin3v_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_tt_spd_0_bin1_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_tt_spd_100_bin1_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_tt_spd_100_bin2s_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_tt_spd_100_bin3ll_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_tt_spd_m40_bin2s_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_chainingCT_tt_spd_m40_bin3ll_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ff_hold_125_bin2s_pisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ff_hold_m40_bin2s_pifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ff_spd_0_bin1_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ff_spd_100_bin1_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ss_spd_0_bin2v_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ss_spd_0_bin3v_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ss_spd_100_bin2v_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_ss_spd_100_bin3v_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_tt_spd_0_bin1_spifs.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkredCT_tt_spd_100_bin1_spisf.ddb/ddb_nd5revb_timing_routing_delays_physrep_delays_clkred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