# filelist

filenames: requirements/value.cc
filetypes: df
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/tr1/4_metaprogramming/is_same


filenames: range.cc/split.cc/split.h/split_bfs.cc
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/performance/28_regex


filenames: 2.cc/pod.cc
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/26_numerics/adjacent_difference/requirements/explicit_instantiation


filenames: check_nan.cc/check_value.cc/compile.cc/compile_2.cc/compile_cxx17.cc
filetypes: fffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions/07_conf_hyperg


filenames: randint.cc
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/experimental/random


dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/quartus/common/devinfo/20nm/nightfury3

filenames:
  bcm2bits_db/db_nightfury3_v1fbga1152a_parasitic.db/db_nightfury3_v1fbga1152b_parasitic.db/db_nightfury3_v1fbga1517v_parasitic.db/db_nightfury3_v1fbga780a_parasitic.db/db_nightfury3_v3fbga1152a_parasitic.db/db_nightfury3_v3fbga1152b_parasitic.db/db_nightfury3_v3fbga780a_parasitic.db/db_nightfury3fbga1152b_parasitic.db/ddb_nightfury3-2_revprod_830mv_0c.dmf.ddb/ddb_nightfury3-2_revprod_830mv_100c.dmf.ddb/ddb_nightfury3-2_revprod_830mv_n40c.dmf.ddb/ddb_nightfury3-2_revprod_900mv_0c.dmf.ddb/ddb_nightfury3-2_revprod_900mv_0c_fdi.ddb/ddb_nightfury3-2_revprod_900mv_100c.dmf.ddb/ddb_nightfury3-2_revprod_900mv_100c_dem.ddb/ddb_nightfury3-2_revprod_900mv_100c_fdi.ddb/ddb_nightfury3-2_revprod_900mv_110c.dmf.ddb/ddb_nightfury3-2_revprod_900mv_125c.dmf.ddb/ddb_nightfury3-2_revprod_900mv_n40c.dmf.ddb/ddb_nightfury3-2_revprod_900mv_n40c_fdi.ddb/ddb_nightfury3-2_revprod_950mv_0c.dmf.ddb/ddb_nightfury3-2_revprod_950mv_0c_fdi.ddb/ddb_nightfury3-2_revprod_950mv_100c.dmf.ddb/ddb_nightfury3-2_revprod_950mv_100c_dem.ddb/ddb_nightfury3-2_revprod_950mv_100c_fdi.ddb/ddb_nightfury3-2_revprod_950mv_110c.dmf.ddb/ddb_nightfury3-2_revprod_950mv_n40c.dmf.ddb/ddb_nightfury3-2_revprod_950mv_n40c_fdi.ddb/ddb_nightfury3-2_revprod_vid2_0c.dmf.ddb/ddb_nightfury3-2_revprod_vid2_100c.dmf.ddb/ddb_nightfury3-2_revprod_vid3a_0c.dmf.ddb/ddb_nightfury3-2_revprod_vid3a_100c.dmf.ddb/ddb_nightfury3-3_revprod_900mv_0c.dmf.ddb/ddb_nightfury3-3_revprod_900mv_0c_fdi.ddb/ddb_nightfury3-3_revprod_900mv_100c.dmf.ddb/ddb_nightfury3-3_revprod_900mv_100c_dem.ddb/ddb_nightfury3-3_revprod_900mv_100c_fdi.ddb/ddb_nightfury3-3_revprod_900mv_110c.dmf.ddb/ddb_nightfury3-3_revprod_900mv_110c_dem.ddb/ddb_nightfury3-3_revprod_900mv_110c_fdi.ddb/ddb_nightfury3-3_revprod_900mv_125c.dmf.ddb/ddb_nightfury3-3_revprod_900mv_125c_dem.ddb/ddb_nightfury3-3_revprod_900mv_125c_fdi.ddb/ddb_nightfury3-3_revprod_900mv_n40c.dmf.ddb/ddb_nightfury3-3_revprod_900mv_n40c_fdi.ddb/ddb_nightfury3-3_revprod_950mv_0c.dmf.ddb/ddb_nightfury3-3_revprod_950mv_0c_fdi.ddb/ddb_nightfury3-3_revprod_950mv_100c.dmf.ddb/ddb_nightfury3-3_revprod_950mv_100c_dem.ddb/ddb_nightfury3-3_revprod_950mv_100c_fdi.ddb/ddb_nightfury3-3_revprod_950mv_110c.dmf.ddb/ddb_nightfury3-3_revprod_950mv_110c_fdi.ddb/ddb_nightfury3-3_revprod_950mv_n40c.dmf.ddb/ddb_nightfury3-3_revprod_950mv_n40c_fdi.ddb/ddb_nightfury3-3_revprod_vid2_0c.dmf.ddb/ddb_nightfury3-3_revprod_vid2_100c.dmf.ddb/ddb_nightfury3-3_revprod_vid2_110c.dmf.ddb/ddb_nightfury3-4_revprod_900mv_0c.dmf.ddb/ddb_nightfury3-4_revprod_900mv_0c_fdi.ddb/ddb_nightfury3-4_revprod_900mv_100c.dmf.ddb/ddb_nightfury3-4_revprod_900mv_100c_dem.ddb/ddb_nightfury3-4_revprod_900mv_100c_fdi.ddb/ddb_nightfury3-4_revprod_900mv_110c.dmf.ddb/ddb_nightfury3-4_revprod_900mv_110c_dem.ddb/ddb_nightfury3-4_revprod_900mv_110c_fdi.ddb/ddb_nightfury3-4_revprod_900mv_125c.dmf.ddb/ddb_nightfury3-4_revprod_900mv_125c_dem.ddb/ddb_nightfury3-4_revprod_900mv_125c_fdi.ddb/ddb_nightfury3-4_revprod_900mv_n40c.dmf.ddb/ddb_nightfury3-4_revprod_900mv_n40c_fdi.ddb/ddb_nightfury3-4_revprod_950mv_0c.dmf.ddb/ddb_nightfury3-4_revprod_950mv_0c_fdi.ddb/ddb_nightfury3-4_revprod_950mv_100c.dmf.ddb/ddb_nightfury3-4_revprod_950mv_100c_dem.ddb/ddb_nightfury3-4_revprod_950mv_100c_fdi.ddb/ddb_nightfury3-4_revprod_950mv_110c.dmf.ddb/ddb_nightfury3-4_revprod_950mv_110c_fdi.ddb/ddb_nightfury3-4_revprod_950mv_n40c.dmf.ddb/ddb_nightfury3-4_revprod_950mv_n40c_fdi.ddb/ddb_nightfury3-4_revprod_vid3a_0c.dmf.ddb/ddb_nightfury3-4_revprod_vid3a_0c_fdi.ddb/ddb_nightfury3-4_revprod_vid3a_100c.dmf.ddb/ddb_nightfury3-4_revprod_vid3a_100c_fdi.ddb/ddb_nightfury3-4_revprod_vid3a_110c.dmf.ddb/ddb_nightfury3-4_revprod_vid3b_0c.dmf.ddb/ddb_nightfury3-4_revprod_vid3b_0c_fdi.ddb/ddb_nightfury3-4_revprod_vid3b_100c.dmf.ddb/ddb_nightfury3-4_revprod_vid3b_100c_fdi.ddb/ddb_nightfury3-ff_revprod_830mv_0c.dmf.ddb/ddb_nightfury3-ff_revprod_830mv_100c.dmf.ddb/ddb_nightfury3-ff_revprod_830mv_n40c.dmf.ddb/ddb_nightfury3-ff_revprod_900mv_0c.dmf.ddb/ddb_nightfury3-ff_revprod_900mv_100c.dmf.ddb/ddb_nightfury3-ff_revprod_900mv_110c.dmf.ddb/ddb_nightfury3-ff_revprod_900mv_125c.dmf.ddb/ddb_nightfury3-ff_revprod_900mv_n40c.dmf.ddb/ddb_nightfury3-ff_revprod_950mv_0c.dmf.ddb/ddb_nightfury3-ff_revprod_950mv_100c.dmf.ddb/ddb_nightfury3-ff_revprod_950mv_110c.dmf.ddb/ddb_nightfury3-ff_revprod_950mv_n40c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_830mv_0c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_830mv_100c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_830mv_n40c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_900mv_0c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_900mv_100c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_900mv_110c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_900mv_125c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_900mv_n40c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_950mv_0c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_950mv_100c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_950mv_110c.dmf.ddb/ddb_nightfury3-ffscaled_revprod_950mv_n40c.dmf.ddb/ddb_nightfury3-ii_revprod_900mv_0c.dmf.ddb/ddb_nightfury3-ii_revpr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filetypes:
  dffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff


filenames: explicit_instantiation
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/25_algorithms/remove_copy_if/requirements


filenames: default.cc/gen1.cc/seed1.c/seed2.c
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry/cons


filenames: explicit_instantiation.cc/typedefs.cc
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/tr1/4_metaprogramming/has_trivial_copy/requirements


filenames: cons/operators/requirements
filetypes: ddd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/tr1/5_numerical_facilities/random/subtract_with_carry_01


filenames: requirements
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/20_util/make_signed


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/27_io/basic_istream/extractors_arithmetic/char

filenames:
[cell repeats an earlier one in this file: 162 characters]


filenames: result_recorder.hpp/sample_mean.hpp/sample_mean_confidence_checker.hpp/sample_variance.hpp
filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/util/statistic


filenames: 1.cc/check_type.cc/requirements/vectorbool.cc
filetypes: ffdf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/25_algorithms/find_end


filenames: 1.cc
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/21_strings/basic_string_view/operations/ends_with/wchar_t


filenames: citerators.cc/do_the_right_thing.cc/dr438/exception/explicit_instantiation/typedefs.cc
filetypes: ffdddf
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/src/gcc-9.3.1/libstdc++-v3/testsuite/ext/vstring/requirements


filenames: opt_random.h
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.3.0/QuartusPrimePro/20.2/nios2eds/bin/gnu/nios2-elf/include/c++/9.3.1/nios2-elf/march-r2/mhw-mulx/pg/ext


filenames: default.cc/parms.cc
filetypes: ff
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: ffffddfff
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filenames:
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filenames: src
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dirname:
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filenames: altera_eth_avalon_mm_adapter.v
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dirname:
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filenames: intel_mbox_reset_handler.sv/intel_mbox_reset_handler_hw.tcl
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dirname:
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filenames: ilk_24l_6g_rx_stripe_adapter.v/ilk_24l_6g_tx_stripe_adapter.v
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dirname:
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filenames:
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filetypes: ffffffffffff
dirname:
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filenames:
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filenames: pcie_ed_master_0.v/pcie_example_design_master_0.v
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dirname:
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filetypes: fffffffff
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filenames:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/hbm/ip_tg_avl/mentor/rtl
filetypes: fffffffffffffffffffffffff
filenames:
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filenames: dynamic_reconfiguration_hardware/dynamic_reconfiguration_sim
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dirname:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: altera_vic_vector.sv/altera_vic_vector_hw.tcl
filetypes: ff
dirname:
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filenames: kr4.tcl
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dirname:
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filetypes: ffffff
dirname:
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filenames:
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filenames: alt_vip_tpg_alg_core.sv
filetypes: f
dirname:
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filetypes: fffff
dirname:
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filenames:
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filetypes: fffffffffff
dirname:
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filenames:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: alt_vip_common_frame_counter.v
filetypes: f
dirname:
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filenames: intel_generic_serial_flash_interface_xip.sv.terp/intel_generic_serial_flash_interface_xip_hw.tcl
filetypes: ff
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffff
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filenames:
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filenames: altera_rapidio2_dev16_io_master.v/altera_rapidio2_dev8_io_master.v
filetypes: ff
dirname:
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filenames: 128/64
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dirname:
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filenames: memphy_common_pin_map.tcl
filetypes: f
dirname:
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filenames: altera_rldramii_board_delay_model_hw.tcl/altera_rldramii_board_delay_model_top.sv
filetypes: ff
dirname:
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filenames: alt_vip_video_input_bridge_cmd.sv
filetypes: f
dirname:
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filetypes: ffffff
dirname:
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filenames:
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filetypes: dddddddddddddddd
dirname:
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filenames:
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filenames: altera_avalon_st_tap_hw.tcl
filetypes: f
dirname:
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filenames: aldec/alt_vip_csc_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
filetypes: dfdddd
dirname:
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filetypes: dffffffffffddd
dirname:
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filenames:
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filenames: alt_vip_vfb_sync_ctrl.sv
filetypes: f
dirname:
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filetypes: ffffffffff
dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_aeu_clks_100.v/alt_aeu_fifo_depth_100.v/alt_aeu_ptp_rx_100.v
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dirname:
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filenames: altera_avalon_spi_regs.h
filetypes: f
dirname:
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filenames: src_hdl
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filenames: src_hdl
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  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/seriallite_iii/example/example_tb/scripts


filenames: pkt_client.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e40c3/example_project/hwtest/altera/pkt_client


filetypes: ffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_xcvr/altera_xcvr_10gbase_kr/sv_soft_10gbaser/synopsys/sv_soft_pcs

filenames:
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filenames: alt_vip_common_h_kernel.sv/alt_vip_common_h_kernel_par.sv/alt_vip_common_h_kernel_seq.sv
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_h_kernel/src_hdl


filenames: altera_reset_synchronizer.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_10G_LINESIDE_1588v2/rtl/reset_sync


filetypes: ffffffffffffffffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_uflex_interlaken/uflex_ilk_xcoder/aldec

filenames:
[cell repeats an earlier one in this file: 566 characters]


filetypes: fffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_1588v2/rtl/address_decoder/ip_s10/alt_mge_rd_addrdec_mch

filenames:
[cell repeats an earlier one in this file: 539 characters]


filenames: alt_vip_interlacer_scheduler.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/component_ip/schedulers/alt_vip_interlacer_scheduler/cadence/src_hdl


filenames: alt_xcvr_reset_sync.v/alt_xcvr_reset_sync_hw.tcl
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_xcvr/alt_xcvr_ip_lib/alt_xcvr_reset_sync


filenames: alt_e2550_avl_filter.v/alt_e25s10_reset.v/s10_rst_ctrl.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e25s10/25g/aldec/rtl/top


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/intel_fpga_ldpc_5g/src/enc/synopsys/rtl/core

filenames:
[cell repeats an earlier one in this file: 103 characters]


filetypes: fffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_ehipc3_fm/example_project/hwtest_sl/tests

filenames:
  c3_ehip_ptp_traffic_basic_test.tcl/c3_ehip_traffic_basic_test.tcl/c3_ehip_xcvr_loopback_test.tcl/c3_elane_pcsonly_traffic_basic_test.tcl/c3_elane_ppm_traffic_basic_test.tcl/c3_elane_ppm_xcvr_loopback_test.tcl/c3_elane_ptp_ppm_traffic_basic_test.tcl/c3_elane_ptp_sn_traffic_basic_test.tcl/c3_elane_ptp_traffic_basic_test.tcl/c3_elane_traffic_basic_test.tcl/c3_elane_xcvr_loopback_test.tcl


filetypes: ffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/intel_pcie/avmm_bridge_512/synopsys/rddm_ext_tag

filenames:
  altera_pcie_s10_fifo.sv/altera_pcie_s10_sclkfifo.sv/intel_pcie_rddm_2.sv/intel_pcie_rddm_cpl_2.sv/intel_pcie_rddm_cpl_cmd_2.sv/intel_pcie_rddm_cpl_data_2.sv/intel_pcie_rddm_desc_preproc_2.sv/intel_pcie_rddm_header_gen_2.sv/intel_pcie_rddm_rdmaster_2.sv/intel_pcie_rddm_tagram_2.sv


filenames: auk_dspip_crc24ab.vhd/crc_pkg.vhd
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/altera_turbo/LTE/cadence/src/rtl/crc


filenames: altera_rapidio2_native_phy.v
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio2/src/synopsys/altera_rapidio2_native_phy_ip/native_phy_cyclonev/native_phy_4x


filenames: default_test_params_pkg.sv.terp/ed_sim
filetypes: fd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_em10g32/example_design/LL10G_1G_2_5G_10G_1588v2/simulation


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_e100s10/100g/mentor


filenames: inc/src
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/sopc_builder_ip/altera_avalon_performance_counter/HAL


filetypes: ffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_pcie/altera_pcie_s10_ed/altera_avalon_dma

filenames:
[cell repeats an earlier one in this file: 127 characters]


filenames: tpg_ctrl.tcl.terp
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/sdi_ii/sdi_ii_example_design/common/hwtest


filenames: tl_large/tl_small
filetypes: dd
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_rapidio/src/aldec/logical/io_master


filetypes: fffffffffffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/intel_jesd204c/src/common/mentor

filenames:
  altera_std_synchronizer_nocut.v/j204c_binary_shifter.v/j204c_bit_synchronizer.v/j204c_bmon_bit_reversal.v/j204c_clkctrl.v/j204c_clkratio.v/j204c_clkratio_gen.v/j204c_common_set_cdc.v/j204c_crc12.v/j204c_data_stage.v/j204c_fifo_sync.v/j204c_lemc_gen.v/j204c_pulse_cdc.v/j204c_rstctrl.v/j204c_streaming_queue.v


filetypes: ffffff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dsp/altera_fft_ii/src/matlab/lib

filenames:
[cell repeats an earlier one in this file: 105 characters]


filenames: rtl
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/ethernet/alt_mge_phy/cadence


filenames: altera_xcvr_interlaken.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_interlaken/alt_interlaken_pcs/mentor


filenames: tx_control_src
filetypes: d
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_hdmi/hw_demo/arria_10/software


filenames: alt_vip_common_data_by_line_rearrange.sv
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/vip/ip_library/common_hdl/modules/alt_vip_common_data_by_line_rearrange/src_hdl


filenames: hdmi_rx.tcl.terp/mr_rx_oversample.v/symbol_aligner.v
filetypes: fff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/altera_hdmi/hw_demo/common/rtl/hdmi_rx


filenames: run_xcelium.sh/xcelium_in_cmd.txt
filetypes: ff
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/dynamic_reconfiguration/etile_dynamic_reconfiguration/example_design/ETH25G_PTP_RSFEC/example_testbench/xcelium


filenames: mcgb.tcl
filetypes: f
dirname:
  /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/alt_xcvr/altera_xcvr_pll/mcgb_package_s20/tcl


dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/quartus/common/devinfo/14nm/nd4p
filenames:
  bcm2bits_db/db_nd4p_e_mx_esfbga2912c_parasitic.db/db_nd4p_e_mxfbga2912c_parasitic.db/db_nd4p_h_mx_esfbga2597a_parasitic.db/db_nd4p_h_mxfbga2597a_parasitic.db/db_nd4pfbga2597a_parasitic.db/ddb_dsp_prime_atom2bcm_map.ddb/ddb_nd4p-1_reva_900mv_0c.dmf.ddb/ddb_nd4p-1_reva_900mv_100c.dmf.ddb/ddb_nd4p-1_reva_900mv_110c.dmf.ddb/ddb_nd4p-1_reva_900mv_125c.dmf.ddb/ddb_nd4p-1_reva_900mv_n40c.dmf.ddb/ddb_nd4p-1_reva_vid1_0c.dmf.ddb/ddb_nd4p-1_reva_vid1_100c.dmf.ddb/ddb_nd4p-1_reva_vid1_110c.dmf.ddb/ddb_nd4p-1_reva_vid1_125c.dmf.ddb/ddb_nd4p-1_reva_vid1_n40c.dmf.ddb/ddb_nd4p-1_revb_900mv_0c.dmf.ddb/ddb_nd4p-1_revb_900mv_100c.dmf.ddb/ddb_nd4p-1_revb_900mv_110c.dmf.ddb/ddb_nd4p-1_revb_900mv_125c.dmf.ddb/ddb_nd4p-1_revb_900mv_n40c.dmf.ddb/ddb_nd4p-1_revb_vid1_0c.dmf.ddb/ddb_nd4p-1_revb_vid1_100c.dmf.ddb/ddb_nd4p-1_revb_vid1_110c.dmf.ddb/ddb_nd4p-1_revb_vid1_125c.dmf.ddb/ddb_nd4p-1_revb_vid1_n40c.dmf.ddb/ddb_nd4p-1_reves_900mv_0c.dmf.ddb/ddb_nd4p-1_reves_900mv_100c.dmf.ddb/ddb_nd4p-1_reves_900mv_110c.dmf.ddb/ddb_nd4p-1_reves_900mv_125c.dmf.ddb/ddb_nd4p-1_reves_900mv_n40c.dmf.ddb/ddb_nd4p-1_reves_vid1_0c.dmf.ddb/ddb_nd4p-1_reves_vid1_100c.dmf.ddb/ddb_nd4p-1_reves_vid1_110c.dmf.ddb/ddb_nd4p-1_reves_vid1_125c.dmf.ddb/ddb_nd4p-1_reves_vid1_n40c.dmf.ddb/ddb_nd4p-1_revesa_900mv_0c.dmf.ddb/ddb_nd4p-1_revesa_900mv_100c.dmf.ddb/ddb_nd4p-1_revesa_900mv_110c.dmf.ddb/ddb_nd4p-1_revesa_900mv_125c.dmf.ddb/ddb_nd4p-1_revesa_900mv_n40c.dmf.ddb/ddb_nd4p-1_revesa_vid1_0c.dmf.ddb/ddb_nd4p-1_revesa_vid1_100c.dmf.ddb/ddb_nd4p-1_revesa_vid1_110c.dmf.ddb/ddb_nd4p-1_revesa_vid1_125c.dmf.ddb/ddb_nd4p-1_revesa_vid1_n40c.dmf.ddb/ddb_nd4p-1_revprod_900mv_0c.dmf.ddb/ddb_nd4p-1_revprod_900mv_0c_fdi.ddb/ddb_nd4p-1_revprod_900mv_100c.dmf.ddb/ddb_nd4p-1_revprod_900mv_100c_dem.ddb/ddb_nd4p-1_revprod_900mv_100c_fdi.ddb/ddb_nd4p-1_revprod_900mv_110c.dmf.ddb/ddb_nd4p-1_revprod_900mv_125c.dmf.ddb/ddb_nd4p-1_revprod_900mv_n40c.dmf.ddb/ddb_nd4p-1_revprod_vid1_0c.dmf.ddb/ddb_nd4p-1_revprod_vid1_0c_fdi.ddb/ddb_nd4p-1_revprod_vid1_100c.dmf.ddb/ddb_nd4p-1_revprod_vid1_100c_fdi.ddb/ddb_nd4p-1_revprod_vid1_110c.dmf.ddb/ddb_nd4p-1_revprod_vid1_125c.dmf.ddb/ddb_nd4p-1_revprod_vid1_n40c.dmf.ddb/ddb_nd4p-2_reva_850mv_0c.dmf.ddb/ddb_nd4p-2_reva_850mv_100c.dmf.ddb/ddb_nd4p-2_reva_850mv_110c.dmf.ddb/ddb_nd4p-2_reva_850mv_125c.dmf.ddb/ddb_nd4p-2_reva_850mv_n40c.dmf.ddb/ddb_nd4p-2_reva_900mv_0c.dmf.ddb/ddb_nd4p-2_reva_900mv_0c_fdi.ddb/ddb_nd4p-2_reva_900mv_100c.dmf.ddb/ddb_nd4p-2_reva_900mv_100c_dem.ddb/ddb_nd4p-2_reva_900mv_100c_fdi.ddb/ddb_nd4p-2_reva_900mv_110c.dmf.ddb/ddb_nd4p-2_reva_900mv_125c.dmf.ddb/ddb_nd4p-2_reva_900mv_n40c.dmf.ddb/ddb_nd4p-2_reva_900mv_n40c_fdi.ddb/ddb_nd4p-2_reva_vid2_0c.dmf.ddb/ddb_nd4p-2_reva_vid2_0c_fdi.ddb/ddb_nd4p-2_reva_vid2_100c.dmf.ddb/ddb_nd4p-2_reva_vid2_100c_fdi.ddb/ddb_nd4p-2_reva_vid2_110c.dmf.ddb/ddb_nd4p-2_reva_vid2_125c.dmf.ddb/ddb_nd4p-2_reva_vid2_n40c.dmf.ddb/ddb_nd4p-2_reva_vid2_n40c_fdi.ddb/ddb_nd4p-2_revb_850mv_0c.dmf.ddb/ddb_nd4p-2_revb_850mv_100c.dmf.ddb/ddb_nd4p-2_revb_850mv_110c.dmf.ddb/ddb_nd4p-2_revb_850mv_125c.dmf.ddb/ddb_nd4p-2_revb_850mv_n40c.dmf.ddb/ddb_nd4p-2_revb_900mv_0c.dmf.ddb/ddb_nd4p-2_revb_900mv_100c.dmf.ddb/ddb_nd4p-2_revb_900mv_110c.dmf.ddb/ddb_nd4p-2_revb_900mv_125c.dmf.ddb/ddb_nd4p-2_revb_900mv_n40c.dmf.ddb/ddb_nd4p-2_revb_vid2_0c.dmf.ddb/ddb_nd4p-2_revb_vid2_100c.dmf.ddb/ddb_nd4p-2_revb_vid2_110c.dmf.ddb/ddb_nd4p-2_revb_vid2_125c.dmf.ddb/ddb_nd4p-2_revb_vid2_n40c.dmf.ddb/ddb_nd4p-2_reves_850mv_0c.dmf.ddb/ddb_nd4p-2_reves_850mv_100c.dmf.ddb/ddb_nd4p-2_reves_850mv_110c.dmf.ddb/ddb_nd4p-2_reves_850mv_125c.dmf.ddb/ddb_nd4p-2_reves_850mv_n40c.dmf.ddb/ddb_nd4p-2_reves_900mv_0c.dmf.ddb/ddb_nd4p-2_reves_900mv_100c.dmf.ddb/ddb_nd4p-2_reves_900mv_110c.dmf.ddb/ddb_nd4p-2_reves_900mv_125c.dmf.ddb/ddb_nd4p-2_reves_900mv_n40c.dmf.ddb/ddb_nd4p-2_reves_vid2_0c.dmf.ddb/ddb_nd4p-2_reves_vid2_100c.dmf.ddb/ddb_nd4p-2_reves_vid2_110c.dmf.ddb/ddb_nd4p-2_reves_vid2_125c.dmf.ddb/ddb_nd4p-2_reves_vid2_n40c.dmf.ddb/ddb_nd4p-2_revesa_850mv_0c.dmf.ddb/ddb_nd4p-2_revesa_850mv_100c.dmf.ddb/ddb_nd4p-2_revesa_850mv_110c.dmf.ddb/ddb_nd4p-2_revesa_850mv_125c.dmf.ddb/ddb_nd4p-2_revesa_850mv_n40c.dmf.ddb/ddb_nd4p-2_revesa_900mv_0c.dmf.ddb/ddb_nd4p-2_revesa_900mv_100c.dmf.ddb/ddb_nd4p-2_revesa_900mv_110c.dmf.ddb/ddb_nd4p-2_revesa_900mv_125c.dmf.ddb/ddb_nd4p-2_revesa_900mv_n40c.dmf.ddb/ddb_nd4p-2_revesa_vid2_0c.dmf.ddb/ddb_nd4p-2_revesa_vid2_100c.dmf.ddb/ddb_nd4p-2_revesa_vid2_110c.dmf.ddb/ddb_nd4p-2_revesa_vid2_125c.dmf.ddb/ddb_nd4p-2_revesa_vid2_n40c.dmf.ddb/ddb_nd4p-2_revprod_850mv_0c.dmf.ddb/ddb_nd4p-2_revprod_850mv_100c.dmf.ddb/ddb_nd4p-2_revprod_850mv_110c.dmf.ddb/ddb_nd4p-2_revprod_850mv_125c.dmf.ddb/ddb_nd4p-2_revprod_850mv_n40c.dmf.ddb/ddb_nd4p-2_revprod_900mv_0c.dmf.ddb/ddb_nd4p-2_revprod_900mv_0c_fdi.ddb/ddb_nd4p-2_revprod_900mv_100c.dmf.ddb/ddb_nd4p-2_revprod_900mv_100c_dem.ddb/ddb_nd4p-2_revprod_900mv_100c_fdi.ddb/ddb_nd4p-2_revprod_900mv_110c.dmf.ddb/ddb_nd4p-2_revprod_900mv_125c.dmf.ddb/ddb_nd4p-2_revprod_900mv_n40c.dmf.ddb/ddb_nd4p-2_revprod_vid2_0c.dmf.ddb/ddb_nd4p-2_revprod_vid2_0c_fdi.ddb/ddb_nd4p-2_revprod_vid2_100c.dmf.ddb/ddb_nd4p-2_revprod_vid2_100c_fdi.ddb/ddb_nd4p-2_revprod_vid2_110c.dmf.ddb/ddb_nd4p-2_revprod_vid2_125c.dmf.ddb/ddb_nd4p-2_revprod_vid2_n40c.dmf.ddb/ddb_nd4p-3_reva_850mv_0c.dmf.ddb/ddb_nd4p-3_reva_850mv_100c.dmf.ddb/ddb_nd4p-3_reva_850mv_110c.dmf.ddb/ddb_nd4p-3_reva_850mv_125c.dmf.ddb/ddb_nd4p-3_reva_850mv_n40c.dmf.ddb/ddb_nd4p-3_reva_900mv_0c.dmf.ddb/ddb_nd4p-3_reva_900mv_100c.dmf.ddb/ddb_nd4p-3_reva_900mv_110c.dmf.ddb/ddb_nd4p-3_reva_900mv_125c.dmf.ddb/ddb_nd4p-3_reva_900mv_n40c.dmf.ddb/ddb_nd4p-3_reva_vid3a_0c.dmf.ddb/ddb_nd4p-3_reva_vid3a_100c.dmf.ddb/ddb_nd4p-3_reva_vid3a_110c.dmf.ddb/ddb_nd4p-3_reva_vid3a_125c.dmf.ddb/ddb_nd4p-3_reva_vid3a_n40c.dmf.ddb/ddb_nd4p-3_revb_850mv_0c.dmf.ddb/ddb_nd4p-3_revb_850mv_100c.dmf.ddb/ddb_nd4p-3_revb_850mv_110c.dmf.ddb/ddb_nd4p-3_revb_850mv_125c.dmf.ddb/ddb_nd4p-3_revb_850mv_n40c.dmf.ddb/ddb_nd4p-3_revb_900mv_0c.dmf.ddb/ddb_nd4p-3_revb_900mv_100c.dmf.ddb/ddb_nd4p-3_revb_900mv_110c.dmf.ddb/ddb_nd4p-3_revb_900mv_125c.dmf.ddb/ddb_nd4p-3_revb_900mv_n40c.dmf.ddb/ddb_nd4p-3_revb_vid3a_0c.dmf.ddb/ddb_nd4p-3_revb_vid3a_100c.dmf.ddb/ddb_nd4p-3_revb_vid3a_110c.dmf.ddb/ddb_nd4p-3_revb_vid3a_125c.dmf.ddb/ddb_nd4p-3_revb_vid3a_n40c.dmf.ddb/ddb_nd4p-3_reves_850mv_0c.dmf.ddb/ddb_nd4p-3_reves_850mv_100c.dmf.ddb/ddb_nd4p-3_reves_850mv_110c.dmf.ddb/ddb_nd4p-3_reves_850mv_125c.dmf.ddb/ddb_nd4p-3_reves_850mv_n40c.dmf.ddb/ddb_nd4p-3_reves_900mv_0c.dmf.ddb/ddb_nd4p-3_reves_900mv_100c.dmf.ddb/ddb_nd4p-3_reves_900mv_110c.dmf.ddb/ddb_nd4p-3_reves_900mv_125c.dmf.ddb/ddb_nd4p-3_reves_900mv_n40c.dmf.ddb/ddb_nd4p-3_reves_vid3a_0c.dmf.ddb/ddb_nd4p-3_reves_vid3a_100c.dmf.ddb/ddb_nd4p-3_reves_vid3a_110c.dmf.ddb/ddb_nd4p-3_reves_vid3a_125c.dmf.ddb/ddb_nd4p-3_reves_vid3a_n40c.dmf.ddb/ddb_nd4p-3_revesa_850mv_0c.dmf.ddb/ddb_nd4p-3_revesa_850mv_100c.dmf.ddb/ddb_nd4p-3_revesa_850mv_110c.dmf.ddb/ddb_nd4p-3_revesa_850mv_125c.dmf.ddb/ddb_nd4p-3_revesa_850mv_n40c.dmf.ddb/ddb_nd4p-3_revesa_900mv_0c.dmf.ddb/ddb_nd4p-3_revesa_900mv_100c.dmf.ddb/ddb_nd4p-3_revesa_900mv_110c.dmf.ddb/ddb_nd4p-3_revesa_900mv_125c.dmf.ddb/ddb_nd4p-3_revesa_900mv_n40c.dmf.ddb/ddb_nd4p-3_revesa_vid3a_0c.dmf.ddb/ddb_nd4p-3_revesa_vid3a_100c.dmf.ddb/ddb_nd4p-3_revesa_vid3a_110c.dmf.ddb/ddb_nd4p-3_revesa_vid3a_125c.dmf.ddb/ddb_nd4p-3_revesa_vid3a_n40c.dmf.ddb/ddb_nd4p-3_revprod_850mv_0c.dmf.ddb/ddb_nd4p-3_revprod_850mv_100c.dmf.ddb/ddb_nd4p-3_revprod_850mv_110c.dmf.ddb/ddb_nd4p-3_revprod_850mv_125c.dmf.ddb/ddb_nd4p-3_revprod_850mv_n40c.dmf.ddb/ddb_nd4p-3_revprod_900mv_0c.dmf.ddb/ddb_nd4p-3_revprod_900mv_0c_fdi.ddb/ddb_nd4p-3_revprod_900mv_100c.dmf.ddb/ddb_nd4p-3_revprod_900mv_100c_dem.ddb/ddb_nd4p-3_revprod_900mv_100c_fdi.ddb/ddb_nd4p-3_revprod_900mv_110c.dmf.ddb/ddb_nd4p-3_revprod_900mv_125c.dmf.ddb/ddb_nd4p-3_revprod_900mv_n40c.dmf.ddb/ddb_nd4p-3_revprod_vid3a_0c.dmf.ddb/ddb_nd4p-3_revprod_vid3a_0c_fdi.ddb/ddb_nd4p-3_revprod_vid3a_100c.dmf.ddb/ddb_nd4p-3_revprod_vid3a_100c_fdi.ddb/ddb_nd4p-3_revprod_vid3a_110c.dmf.ddb/ddb_nd4p-3_revprod_vid3a_125c.dmf.ddb/ddb_nd4p-3_revprod_vid3a_n40c.dmf.ddb/ddb_nd4p-ff_reva_800mv_0c.dmf.ddb/ddb_nd4p-ff_reva_800mv_100c.dmf.ddb/ddb_nd4p-ff_reva_800mv_110c.dmf.ddb/ddb_nd4p-ff_reva_800mv_125c.dmf.ddb/ddb_nd4p-ff_reva_800mv_n40c.dmf.ddb/ddb_nd4p-ff_reva_850mv_0c.dmf.ddb/ddb_nd4p-ff_reva_850mv_100c.dmf.ddb/ddb_nd4p-ff_reva_850mv_110c.dmf.ddb/ddb_nd4p-ff_reva_850mv_125c.dmf.ddb/ddb_nd4p-ff_reva_850mv_n40c.dmf.ddb/ddb_nd4p-ff_reva_900mv_0c.dmf.ddb/ddb_nd4p-ff_reva_900mv_100c.dmf.ddb/ddb_nd4p-ff_reva_900mv_110c.dmf.ddb/ddb_nd4p-ff_reva_900mv_125c.dmf.ddb/ddb_nd4p-ff_reva_900mv_n40c.dmf.ddb/ddb_nd4p-ff_reva_vid1_0c.dmf.ddb/ddb_nd4p-ff_reva_vid1_100c.dmf.ddb/ddb_nd4p-ff_reva_vid1_110c.dmf.ddb/ddb_nd4p-ff_reva_vid1_125c.dmf.ddb/ddb_nd4p-ff_reva_vid1_n40c.dmf.ddb/ddb_nd4p-ff_revb_800mv_0c.dmf.ddb/ddb_nd4p-ff_revb_800mv_100c.dmf.ddb/ddb_nd4p-ff_revb_800mv_110c.dmf.ddb/ddb_nd4p-ff_revb_800mv_125c.dmf.ddb/ddb_nd4p-ff_revb_800mv_n40c.dmf.ddb/ddb_nd4p-ff_revb_850mv_0c.dmf.ddb/ddb_nd4p-ff_revb_850mv_100c.dmf.ddb/ddb_nd4p-ff_revb_850mv_110c.dmf.ddb/ddb_nd4p-ff_revb_850mv_125c.dmf.ddb/ddb_nd4p-ff_revb_850mv_n40c.dmf.ddb/ddb_nd4p-ff_revb_900mv_0c.dmf.ddb/ddb_nd4p-ff_revb_900mv_100c.dmf.ddb/ddb_nd4p-ff_revb_900mv_110c.dmf.ddb/ddb_nd4p-ff_revb_900mv_125c.dmf.ddb/ddb_nd4p-ff_revb_900mv_n40c.dmf.ddb/ddb_nd4p-ff_revb_vid1_0c.dmf.ddb/ddb_nd4p-ff_revb_vid1_100c.dmf.ddb/ddb_nd4p-ff_revb_vid1_110c.dmf.ddb/ddb_nd4p-ff_revb_vid1_125c.dmf.ddb/ddb_nd4p-ff_revb_vid1_n40c.dmf.ddb/ddb_nd4p-ff_reves_800mv_0c.dmf.ddb/ddb_nd4p-ff_reves_800mv_100c.dmf.ddb/ddb_nd4p-ff_reves_800mv_110c.dmf.ddb/ddb_nd4p-ff_reves_800mv_125c.dmf.ddb/ddb_nd4p-ff_reves_800mv_n40c.dmf.ddb/ddb_nd4p-ff_reves_850mv_0c.dmf.ddb/ddb_nd4p-ff_reves_850mv_100c.dmf.ddb/ddb_nd4p-ff_reves_850mv_110c.dmf.ddb/ddb_nd4p-ff_reves_850mv_125c.dmf.ddb/ddb_nd4p-ff_reves_850mv_n40c.dmf.ddb/ddb_nd4p-ff_reves_900mv_0c.dmf.ddb/ddb_nd4p-ff_reves_900mv_100c.dmf.ddb/ddb_nd4p-ff_reves_900mv_110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es_850mv_125c.dmf.ddb/ddb_nd4p-tt_reves_850mv_n40c.dmf.ddb/ddb_nd4p-tt_reves_900mv_0c.dmf.ddb/ddb_nd4p-tt_reves_900mv_100c.dmf.ddb/ddb_nd4p-tt_reves_900mv_110c.dmf.ddb/ddb_nd4p-tt_reves_900mv_125c.dmf.ddb/ddb_nd4p-tt_reves_900mv_n40c.dmf.ddb/ddb_nd4p-tt_reves_vid2_0c.dmf.ddb/ddb_nd4p-tt_reves_vid2_100c.dmf.ddb/ddb_nd4p-tt_reves_vid2_110c.dmf.ddb/ddb_nd4p-tt_reves_vid2_125c.dmf.ddb/ddb_nd4p-tt_reves_vid2_n40c.dmf.ddb/ddb_nd4p-tt_reves_vid3a_0c.dmf.ddb/ddb_nd4p-tt_reves_vid3a_100c.dmf.ddb/ddb_nd4p-tt_reves_vid3a_110c.dmf.ddb/ddb_nd4p-tt_reves_vid3a_125c.dmf.ddb/ddb_nd4p-tt_reves_vid3a_n40c.dmf.ddb/ddb_nd4p-tt_revesa_800mv_0c.dmf.ddb/ddb_nd4p-tt_revesa_800mv_100c.dmf.ddb/ddb_nd4p-tt_revesa_800mv_110c.dmf.ddb/ddb_nd4p-tt_revesa_800mv_125c.dmf.ddb/ddb_nd4p-tt_revesa_800mv_n40c.dmf.ddb/ddb_nd4p-tt_revesa_850mv_0c.dmf.ddb/ddb_nd4p-tt_revesa_850mv_100c.dmf.ddb/ddb_nd4p-tt_revesa_850mv_110c.dmf.ddb/ddb_nd4p-tt_revesa_850mv_125c.dmf.ddb/ddb_nd4p-tt_revesa_850mv_n40c.dmf.ddb/ddb_nd4p-tt_revesa_900mv_0c.dmf.ddb/ddb_nd4p-tt_revesa_900mv_100c.dmf.ddb/ddb_nd4p-tt_revesa_900mv_110c.dmf.ddb/ddb_nd4p-tt_revesa_900mv_125c.dmf.ddb/ddb_nd4p-tt_revesa_900mv_n40c.dmf.ddb/ddb_nd4p-tt_revesa_vid2_0c.dmf.ddb/ddb_nd4p-tt_revesa_vid2_100c.dmf.ddb/ddb_nd4p-tt_revesa_vid2_110c.dmf.ddb/ddb_nd4p-tt_revesa_vid2_125c.dmf.ddb/ddb_nd4p-tt_revesa_vid2_n40c.dmf.ddb/ddb_nd4p-tt_revesa_vid3a_0c.dmf.ddb/ddb_nd4p-tt_revesa_vid3a_100c.dmf.ddb/ddb_nd4p-tt_revesa_vid3a_110c.dmf.ddb/ddb_nd4p-tt_revesa_vid3a_125c.dmf.ddb/ddb_nd4p-tt_revesa_vid3a_n40c.dmf.ddb/ddb_nd4p-tt_revprod_800mv_0c.dmf.ddb/ddb_nd4p-tt_revprod_800mv_100c.dmf.ddb/ddb_nd4p-tt_revprod_800mv_110c.dmf.ddb/ddb_nd4p-tt_revprod_800mv_125c.dmf.ddb/ddb_nd4p-tt_revprod_800mv_n40c.dmf.ddb/ddb_nd4p-tt_revprod_850mv_0c.dmf.ddb/ddb_nd4p-tt_revprod_850mv_100c.dmf.ddb/ddb_nd4p-tt_revprod_850mv_110c.dmf.ddb/ddb_nd4p-tt_revprod_850mv_125c.dmf.ddb/ddb_nd4p-tt_revprod_850mv_n40c.dmf.ddb/ddb_nd4p-tt_revprod_900mv_0c.dmf.ddb/ddb_nd4p-tt_revprod_900mv_100c.dmf.ddb/ddb_nd4p-tt_revprod_900mv_110c.dmf.ddb/ddb_nd4p-tt_revprod_900mv_125c.dmf.ddb/ddb_nd4p-tt_revprod_900mv_n40c.dmf.ddb/ddb_nd4p-tt_revprod_vid2_0c.dmf.ddb/ddb_nd4p-tt_revprod_vid2_100c.dmf.ddb/ddb_nd4p-tt_revprod_vid2_110c.dmf.ddb/ddb_nd4p-tt_revprod_vid2_125c.dmf.ddb/ddb_nd4p-tt_revprod_vid2_n40c.dmf.ddb/ddb_nd4p-tt_revprod_vid3a_0c.dmf.ddb/ddb_nd4p-tt_revprod_vid3a_100c.dmf.ddb/ddb_nd4p-tt_revprod_vid3a_110c.dmf.ddb/ddb_nd4p-tt_revprod_vid3a_125c.dmf.ddb/ddb_nd4p-tt_revprod_vid3a_n40c.dmf.ddb/ddb_nd4p-ttbin_reva_800mv_0c.dmf.ddb/ddb_nd4p-ttbin_reva_800mv_100c.dmf.ddb/ddb_nd4p-ttbin_reva_800mv_110c.dmf.ddb/ddb_nd4p-ttbin_reva_800mv_125c.dmf.ddb/ddb_nd4p-ttbin_reva_800mv_n40c.dmf.ddb/ddb_nd4p-ttbin_reva_850mv_0c.dmf.ddb/ddb_nd4p-ttbin_reva_850mv_100c.dmf.ddb/ddb_nd4p-ttbin_reva_850mv_110c.dmf.ddb/ddb_nd4p-ttbin_reva_850mv_125c.dmf.ddb/ddb_nd4p-ttbin_reva_850mv_n40c.dmf.ddb/ddb_nd4p-ttbin_reva_900mv_0c.dmf.ddb/ddb_nd4p-ttbin_reva_900mv_100c.dmf.ddb/ddb_nd4p-ttbin_reva_900mv_110c.dmf.ddb/ddb_nd4p-ttbin_reva_900mv_125c.dmf.ddb/ddb_nd4p-ttbin_reva_900mv_n40c.dmf.ddb/ddb_nd4p-ttbin_reva_vid2_0c.dmf.ddb/ddb_nd4p-ttbin_reva_vid2_100c.dmf.ddb/ddb_nd4p-ttbin_reva_vid2_110c.dmf.ddb/ddb_nd4p-ttbin_reva_vid2_125c.dmf.ddb/ddb_nd4p-ttbin_reva_vid2_n40c.dmf.ddb/ddb_nd4p-ttbin_reva_vid3a_0c.dmf.ddb/ddb_nd4p-ttbin_reva_vid3a_100c.dmf.ddb/ddb_nd4p-ttbin_reva_vid3a_110c.dmf.ddb/ddb_nd4p-ttbin_reva_vid3a_125c.dmf.ddb/ddb_nd4p-ttbin_reva_vid3a_n40c.dmf.ddb/ddb_nd4p-ttbin_revb_800mv_0c.dmf.ddb/ddb_nd4p-ttbin_revb_800mv_100c.dmf.ddb/ddb_nd4p-ttbin_revb_800mv_110c.dmf.ddb/ddb_nd4p-ttbin_revb_800mv_125c.dmf.ddb/ddb_nd4p-ttbin_revb_800mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revb_850mv_0c.dmf.ddb/ddb_nd4p-ttbin_revb_850mv_100c.dmf.ddb/ddb_nd4p-ttbin_revb_850mv_110c.dmf.ddb/ddb_nd4p-ttbin_revb_850mv_125c.dmf.ddb/ddb_nd4p-ttbin_revb_850mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revb_900mv_0c.dmf.ddb/ddb_nd4p-ttbin_revb_900mv_100c.dmf.ddb/ddb_nd4p-ttbin_revb_900mv_110c.dmf.ddb/ddb_nd4p-ttbin_revb_900mv_125c.dmf.ddb/ddb_nd4p-ttbin_revb_900mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revb_vid2_0c.dmf.ddb/ddb_nd4p-ttbin_revb_vid2_100c.dmf.ddb/ddb_nd4p-ttbin_revb_vid2_110c.dmf.ddb/ddb_nd4p-ttbin_revb_vid2_125c.dmf.ddb/ddb_nd4p-ttbin_revb_vid2_n40c.dmf.ddb/ddb_nd4p-ttbin_revb_vid3a_0c.dmf.ddb/ddb_nd4p-ttbin_revb_vid3a_100c.dmf.ddb/ddb_nd4p-ttbin_revb_vid3a_110c.dmf.ddb/ddb_nd4p-ttbin_revb_vid3a_125c.dmf.ddb/ddb_nd4p-ttbin_revb_vid3a_n40c.dmf.ddb/ddb_nd4p-ttbin_reves_800mv_0c.dmf.ddb/ddb_nd4p-ttbin_reves_800mv_100c.dmf.ddb/ddb_nd4p-ttbin_reves_800mv_110c.dmf.ddb/ddb_nd4p-ttbin_reves_800mv_125c.dmf.ddb/ddb_nd4p-ttbin_reves_800mv_n40c.dmf.ddb/ddb_nd4p-ttbin_reves_850mv_0c.dmf.ddb/ddb_nd4p-ttbin_reves_850mv_100c.dmf.ddb/ddb_nd4p-ttbin_reves_850mv_110c.dmf.ddb/ddb_nd4p-ttbin_reves_850mv_125c.dmf.ddb/ddb_nd4p-ttbin_reves_850mv_n40c.dmf.ddb/ddb_nd4p-ttbin_reves_900mv_0c.dmf.ddb/ddb_nd4p-ttbin_reves_900mv_100c.dmf.ddb/ddb_nd4p-ttbin_reves_900mv_110c.dmf.ddb/ddb_nd4p-ttbin_reves_900mv_125c.dmf.ddb/ddb_nd4p-ttbin_reves_900mv_n40c.dmf.ddb/ddb_nd4p-ttbin_reves_vid2_0c.dmf.ddb/ddb_nd4p-ttbin_reves_vid2_100c.dmf.ddb/ddb_nd4p-ttbin_reves_vid2_110c.dmf.ddb/ddb_nd4p-ttbin_reves_vid2_125c.dmf.ddb/ddb_nd4p-ttbin_reves_vid2_n40c.dmf.ddb/ddb_nd4p-ttbin_reves_vid3a_0c.dmf.ddb/ddb_nd4p-ttbin_reves_vid3a_100c.dmf.ddb/ddb_nd4p-ttbin_reves_vid3a_110c.dmf.ddb/ddb_nd4p-ttbin_reves_vid3a_125c.dmf.ddb/ddb_nd4p-ttbin_reves_vid3a_n40c.dmf.ddb/ddb_nd4p-ttbin_revesa_800mv_0c.dmf.ddb/ddb_nd4p-ttbin_revesa_800mv_100c.dmf.ddb/ddb_nd4p-ttbin_revesa_800mv_110c.dmf.ddb/ddb_nd4p-ttbin_revesa_800mv_125c.dmf.ddb/ddb_nd4p-ttbin_revesa_800mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revesa_850mv_0c.dmf.ddb/ddb_nd4p-ttbin_revesa_850mv_100c.dmf.ddb/ddb_nd4p-ttbin_revesa_850mv_110c.dmf.ddb/ddb_nd4p-ttbin_revesa_850mv_125c.dmf.ddb/ddb_nd4p-ttbin_revesa_850mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revesa_900mv_0c.dmf.ddb/ddb_nd4p-ttbin_revesa_900mv_100c.dmf.ddb/ddb_nd4p-ttbin_revesa_900mv_110c.dmf.ddb/ddb_nd4p-ttbin_revesa_900mv_125c.dmf.ddb/ddb_nd4p-ttbin_revesa_900mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid2_0c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid2_100c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid2_110c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid2_125c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid2_n40c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid3a_0c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid3a_100c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid3a_110c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid3a_125c.dmf.ddb/ddb_nd4p-ttbin_revesa_vid3a_n40c.dmf.ddb/ddb_nd4p-ttbin_revprod_800mv_0c.dmf.ddb/ddb_nd4p-ttbin_revprod_800mv_100c.dmf.ddb/ddb_nd4p-ttbin_revprod_800mv_110c.dmf.ddb/ddb_nd4p-ttbin_revprod_800mv_125c.dmf.ddb/ddb_nd4p-ttbin_revprod_800mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revprod_850mv_0c.dmf.ddb/ddb_nd4p-ttbin_revprod_850mv_100c.dmf.ddb/ddb_nd4p-ttbin_revprod_850mv_110c.dmf.ddb/ddb_nd4p-ttbin_revprod_850mv_125c.dmf.ddb/ddb_nd4p-ttbin_revprod_850mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revprod_900mv_0c.dmf.ddb/ddb_nd4p-ttbin_revprod_900mv_100c.dmf.ddb/ddb_nd4p-ttbin_revprod_900mv_110c.dmf.ddb/ddb_nd4p-ttbin_revprod_900mv_125c.dmf.ddb/ddb_nd4p-ttbin_revprod_900mv_n40c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid2_0c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid2_100c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid2_110c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid2_125c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid2_n40c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid3a_0c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid3a_100c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid3a_110c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid3a_125c.dmf.ddb/ddb_nd4p-ttbin_revprod_vid3a_n40c.dmf.ddb/ddb_nd4p-ttscaled_reva_800mv_0c.dmf.ddb/ddb_nd4p-ttscaled_reva_800mv_100c.dmf.ddb/ddb_nd4p-ttscaled_reva_800mv_110c.dmf.ddb/ddb_nd4p-ttscaled_reva_800mv_125c.dmf.ddb/ddb_nd4p-ttscaled_reva_800mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_reva_850mv_0c.dmf.ddb/ddb_nd4p-ttscaled_reva_850mv_100c.dmf.ddb/ddb_nd4p-ttscaled_reva_850mv_110c.dmf.ddb/ddb_nd4p-ttscaled_reva_850mv_125c.dmf.ddb/ddb_nd4p-ttscaled_reva_850mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_reva_900mv_0c.dmf.ddb/ddb_nd4p-ttscaled_reva_900mv_100c.dmf.ddb/ddb_nd4p-ttscaled_reva_900mv_110c.dmf.ddb/ddb_nd4p-ttscaled_reva_900mv_125c.dmf.ddb/ddb_nd4p-ttscaled_reva_900mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid2_0c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid2_100c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid2_110c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid2_125c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid2_n40c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid3a_0c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid3a_100c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid3a_110c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid3a_125c.dmf.ddb/ddb_nd4p-ttscaled_reva_vid3a_n40c.dmf.ddb/ddb_nd4p-ttscaled_revb_800mv_0c.dmf.ddb/ddb_nd4p-ttscaled_revb_800mv_100c.dmf.ddb/ddb_nd4p-ttscaled_revb_800mv_110c.dmf.ddb/ddb_nd4p-ttscaled_revb_800mv_125c.dmf.ddb/ddb_nd4p-ttscaled_revb_800mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_revb_850mv_0c.dmf.ddb/ddb_nd4p-ttscaled_revb_850mv_100c.dmf.ddb/ddb_nd4p-ttscaled_revb_850mv_110c.dmf.ddb/ddb_nd4p-ttscaled_revb_850mv_125c.dmf.ddb/ddb_nd4p-ttscaled_revb_850mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_revb_900mv_0c.dmf.ddb/ddb_nd4p-ttscaled_revb_900mv_100c.dmf.ddb/ddb_nd4p-ttscaled_revb_900mv_110c.dmf.ddb/ddb_nd4p-ttscaled_revb_900mv_125c.dmf.ddb/ddb_nd4p-ttscaled_revb_900mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid2_0c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid2_100c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid2_110c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid2_125c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid2_n40c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid3a_0c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid3a_100c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid3a_110c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid3a_125c.dmf.ddb/ddb_nd4p-ttscaled_revb_vid3a_n40c.dmf.ddb/ddb_nd4p-ttscaled_reves_800mv_0c.dmf.ddb/ddb_nd4p-ttscaled_reves_800mv_100c.dmf.ddb/ddb_nd4p-ttscaled_reves_800mv_110c.dmf.ddb/ddb_nd4p-ttscaled_reves_800mv_125c.dmf.ddb/ddb_nd4p-ttscaled_reves_800mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_reves_850mv_0c.dmf.ddb/ddb_nd4p-ttscaled_reves_850mv_100c.dmf.ddb/ddb_nd4p-ttscaled_reves_850mv_110c.dmf.ddb/ddb_nd4p-ttscaled_reves_850mv_125c.dmf.ddb/ddb_nd4p-ttscaled_reves_850mv_n40c.dmf.ddb/ddb_nd4p-ttscaled_reves_900mv_0c.dmf.ddb/ddb_nd4p-ttscal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filenames: rtl
filetypes: d
dirname:
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filenames:
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filenames: aldec/alt_vip_cvo_scheduler_hw.tcl/cadence/mentor/src_hdl/synopsys
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filetypes: fffff
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filenames:
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filenames: alt_vip_message_width_adapt.sv
filetypes: f
dirname:
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filenames: src_hdl
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dirname:
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filenames:
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filenames: altera_mem_if_rldram3_pll_hw.tcl
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dirname:
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filenames: altera_up_avalon_video_vga_controller.v/altera_up_avalon_video_vga_timing.v
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dirname:
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filenames:
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filenames: class.ptf/em_tristate.pl
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filenames: altera_up_avalon_sram_hw.tcl/doc/hdl
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dirname:
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filenames: alt_vip_common_sync.v
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dirname:
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filetypes: ffffff
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filenames:
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filetypes: ffffffff
dirname:
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filenames:
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filenames: pll.sv
filetypes: f
dirname:
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filenames: inc/src
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dirname:
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filenames: altera_merlin_apb_translator.sv.terp/altera_merlin_apb_translator_hw.tcl
filetypes: ff
dirname:
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filenames: alt_vip_video_over_film.sv
filetypes: f
dirname:
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filenames: edid_ram.tcl.terp
filetypes: f
dirname:
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filenames: alt_e40_fc_top.v/alt_e40_rx_fc.v/alt_e40_tx_fc.v/alt_e40_tx_fc_frame_muxer.v
filetypes: ffff
dirname:
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filenames: src_hdl
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dirname:
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filenames: tl_large/tl_small
filetypes: dd
dirname:
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filenames: alt_vip_stream_cleaner_alg_core.sv
filetypes: f
dirname:
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filenames: mst_switch_strm.v/video_pll_mst.tcl.terp
filetypes: ff
dirname:
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filetypes: fffffffffffffffffffffffffffffffffffffffffffffffff
dirname:
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filenames:
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filenames: alt_vip_common_event_packet_encode.sv
filetypes: f
dirname:
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filetypes: ffffff
dirname:
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filenames: pkt_client.tcl
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filenames: inc/src
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filenames:
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filenames: common/mr42/old_arch/r22sdf
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filenames:
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filenames: aldec/alt_vip_cl_packet_dangler_hw.tcl/cadence/mentor/src_hdl/synopsys
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filenames:
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filenames: alt_vip_bps_converter.sv
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filenames:
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filenames: src_hdl
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filenames: src_hdl
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filenames:
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filenames: alt_vip_mixer_alpha_merge.sv
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filenames: alt_vip_warp_addr_gen.sv/alt_vip_warp_multiply.sv
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filenames: altera_eth_link_fault_generation.v
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dirname:
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filenames: phy_ip_inc.tcl/phy_ip_reg_map.tcl
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filenames: altera_rapidio2_native_phy.v
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filenames: altera_avalon_fifo_util.c
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dirname:
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filenames: alt_vip_common_edge_detect_chain.sv
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dirname:
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filetypes: fffffffffffff
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filenames:
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dirname: /opt/intel/oneapi/intelfpgadpcpp/2021.1.1/QuartusPrimePro/20.2/ip/altera/hbm/ip_top
filetypes: ffffdffffffffffff
filenames:
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filenames: altera/common/kr4/main_script.tcl/main_script_100G_ptp.tcl/main_script_ppm.tcl/src/tests
filetypes: dddfffdd
dirname:
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filetypes: fffffffffffffffff
dirname:
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filenames:
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filenames: alt_mge_rd_addrdec_mch_s10.qsys/alt_mge_rd_avmm_mux_xcvr_rcfg_s10.qsys/ip_s10
filetypes: ffd
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: alt_mge_xcvr_reset_ctrl_channel_s10.ip
filetypes: f
dirname:
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filenames: alt_e100_mac_addr_regs.v/alt_e100_mac_csr.v/alt_e100_status_cntr_pause_sync.v
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dirname:
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filenames: make_qii_design.tcl/make_qsys.tcl/make_sim_design.tcl/readme.txt
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dirname:
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filenames:
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filenames: src_hdl
filetypes: d
dirname:
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filenames: verilog/vhdl
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dirname:
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filetypes: ffffffff
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filenames:
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filetypes: ffffff
dirname:
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filenames:
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filenames: alt_vip_common_sad_tree.sv
filetypes: f
dirname:
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filetypes: ffffffffffffffffff
dirname:
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filenames:
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filenames: bitec_hdmi_rx_audio.v/bitec_hdmi_rx_audio_clk_gen.v
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dirname:
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filenames: alt_e2550_serdes_a10_25g.v
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dirname:
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filenames: ast/csr/efc/eth/kr/mac/pcs/stats
filetypes: dddddddd
dirname:
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filetypes: dffffdfffff
dirname:
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filenames:
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filetypes: ffffff
dirname:
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filenames:
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filenames: altera_mem_if_lpddr2_qseq_hw.tcl
filetypes: f
dirname:
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filenames: src_hdl
filetypes: d
dirname:
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filetypes: fffffffffffffffffffffffffff
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filenames:
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filenames: inc/src
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dirname:
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filenames: altera_mem_if_pll.sv
filetypes: f
dirname:
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filenames: rtl
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dirname:
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filetypes: ffffff
dirname:
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filenames:
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filetypes: fffffffff
dirname:
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filenames:
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filetypes: fffffffffffffffffffffffffffffffffffffffd
dirname:
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filenames:
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